8<( $$,8FSony Xperia XZ PremiumLsony,xperia-mapleqcom,msm8998Whandsetchosenmemory@80000000dmemorypreserved-memory,tmemory@85800000pp{memory@85e00000p{smem-mem@86000000p { memory@86200000p {memory@88f00000Lqcom,rmtfs-memp {memory@8ab00000pp{memory@8b200000p {memory@8cc00000p{3memory@93c00000pP{memory@94100000p {2memory@94300000p0{:memory@95200000p {memory@95210000p!P{memory@95600000p`{memory@95700000pp{mpss-metadata @{4memory@9d400000p@@{memory@f6400000Lshared-dma-poolp@ {memory@fe000000p{memory@fe800000p@{ramoops@ffc00000Lramoopspclocksxo-board Lfixed-clock$  xo_boardsleep-clk Lfixed-clock%divclk1Lgpio-gate-clock'default5. < cpus,cpu@0dcpu Lqcom,kryo280pIpsciWjz l2-cacheLcachecpu@1dcpu Lqcom,kryo280pIpsciWjz cpu@2dcpu Lqcom,kryo280pIpsciWjz cpu@3dcpu Lqcom,kryo280pIpsciWjzcpu@100dcpu Lqcom,kryo280pIpsciWj z l2-cacheLcache cpu@101dcpu Lqcom,kryo280pIpsciWj z cpu@102dcpu Lqcom,kryo280pIpsciWj z cpu@103dcpu Lqcom,kryo280pIpsciWj z cpu-mapcluster0core0 core1 core2 core3cluster1core0core1core2core3idle-statespscicpu-sleep-0-0Larm,idle-statelittle-retentionQVcpu-sleep-0-1Larm,idle-statelittle-power-collapse@.#cpu-sleep-1-0Larm,idle-statebig-retentionORcpu-sleep-1-1Larm,idle-statebig-power-collapse@$ firmwarescmLqcom,scm-msm8998qcom,scmopp-table-dsiLoperating-points-v2opp-131250000 ҷP'opp-210000000 X'opp-312500000 _ 'psci Larm,psci-1.0Psmcremoteproc$Lqcom,msm8998-rpm-procqcom,rpm-procglink-edgeLqcom,glink-rpm 5@Qrpm-requestsLqcom,rpm-msm8998 Xrpm_requestsclock-controllerLqcom,rpmcc-msm8998qcom,rpmcc5lxopower-controllerLqcom,msm8998-rpmpdx1opp-tableLoperating-points-v2opp1opp2 opp30opp4@opp5opp6opp7opp8@opp9opp10regulators-0Lqcom,rpm-pm8998-regulators (7FUdv%8KZs3o@@s4ow@w@s5o s7o l1o m m*l2oOO1+l3oB@B@l5o 5 5l6ow@w@l7ow@w@nl8oOOl9o-*l10o-*l11oB@B@l12ow@w@el13o-*hl14o2R}l15ow@w@l16o)B)Bl17ool18l19o)#@)Bl20o-*-*'l21o-*-* 5gl22o)B)Bl23o22l24o//fl25o/]2pl26oOOl28o--|lvs1lvs29regulators-1Lqcom,rpm-pmi8998-regulatorsbobo26smem Lqcom,smem !smp2p-lpass Lqcom,smp2p 5Q  master-kernelmaster-kernel,slave-kernel slave-kernelCXsmp2p-mpss Lqcom,smp2p 5Q master-kernelmaster-kernel,/slave-kernel slave-kernelCX.smp2p-slpi Lqcom,smp2p 5Q master-kernelmaster-kernel,;slave-kernel slave-kernelCX8thermal-zonescpu0-thermali"tripstrip-point0$_passivecpu-crit _criticalcpu1-thermali"tripstrip-point0$_passivecpu-crit _criticalcpu2-thermali"tripstrip-point0$_passivecpu-crit _criticalcpu3-thermali"tripstrip-point0$_passivecpu-crit _criticalcpu4-thermali"tripstrip-point0$_passivecpu-crit _criticalcpu5-thermali"tripstrip-point0$_passivecpu-crit _criticalcpu6-thermali" tripstrip-point0$_passivecpu-crit _criticalcpu7-thermali" tripstrip-point0$_passivecpu-crit _criticalgpu-bottom-thermali" tripstrip-point0__hotgpu-top-thermali" tripstrip-point0__hotclust0-mhm-thermali"tripstrip-point0__hotclust1-mhm-thermali"tripstrip-point0__hotcluster1-l2-thermali" tripstrip-point0__hotmodem-thermali#tripstrip-point0__hotmem-thermali#tripstrip-point0__hotwlan-thermali#tripstrip-point0__hotq6-dsp-thermali#tripstrip-point0__hotcamera-thermali#tripstrip-point0__hotmultimedia-thermali#tripstrip-point0__hotpm8998-thermali$tripspm8998-alert0(_passivepm8998-critH _criticaltimerLarm,armv8-timer05soc@0,t Lsimple-busclock-controller@100000Lqcom,gcc-msm8998xp  lxosleep_clk 5% 'sram@778000Lqcom,rpm-msg-rampwpqfprom@784000 Lqcom,msm8998-qfpromqcom,qfprompx@b,hstx-trim@23ap:dthermal@10ab000!Lqcom,msm8998-tsensqcom,tsens-v2p  5uplowcritical"thermal@10ae000!Lqcom,msm8998-tsensqcom,tsens-v2p  5uplowcritical#iommu@1680000"Lqcom,msm8998-smmu-v2qcom,smmu-v2ph H5lmnopq(iommu@16c0000"Lqcom,msm8998-smmu-v2qcom,smmu-v2pl x5uvwxyzpcie@1c00000$Lqcom,pcie-msm8998qcom,pcie-msm8996 p  parfdbielbiconfigdpci'8,BL&Qpciephy [disabled0t 00X 5msibu(5'^'['\']'_"lpipeauxcfgbus_masterbus_slave'( )#pcie@0dpcip8,tphy@1c06000Lqcom,msm8998-qmp-pcie-phyp` [disabled 5'`'\''^lauxcfg_ahbrefpipe pcie_0_pipe_clk_src'L'N phycommon*+&ufshc@1da4000,Lqcom,msm8998-ufshcqcom,ufshcjedec,ufs-2.0p@% 5 L,Qufsphy' [disablednlcore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@5'm''l'sP'r'p'q@ <4`р'rst-phy@1da7000Lqcom,msm8998-qmp-ufs-phypp5P'o'lrefref_auxqrefufsphy- [disabled,hwlock@1f40000Lqcom,tcsr-mutexp!syscon@1f60000Lqcom,msm8998-tcsrsysconp0syscon@1fc0000Lqcom,msm8998-tcsrsysconp`cpinctrl@3400000Lqcom,msm8998-pinctrlp@ 5)!1CX=Q+RDEBUG_UART_TXDEBUG_UART_RXCAMSENSOR_I2C_SDACAMSENSOR_I2C_SCLNCNCMDP_VSYNC_PRGBC_IR_INTNFC_VENCAM_MCLK0CAM_MCLK1NCNCCCI_I2C_SDA0CCI_I2C_SCL0CCI_I2C_SDA1CCI_I2C_SCL1MAIN_CAM_PWR_ENTOF_INT_NNCNCCHAT_CAM_PWR_ENNCTOF_RESET_NCAM2_RSTNNCCAM1_RSTNNCNCNCNCNCNCNCCC_DIRUIM2_DETECT_ENFP_RESET_NNCNCNCNCBT_HCI_UART_TXDBT_HCI_UART_RXDBT_HCI_UART_CTS_NBT_HCI_UART_RFR_NNCNCNCNCCODEC_INT2_NCODEC_INT1_NAPPS_I2C_SDAAPPS_I2C_SCLFORCED_USB_BOOTNCNCNCNCNCTRAY2_DET_DSCODEC_RST_NWSA_L_ENWSA_R_ENNCNCNCLPASS_SLIMBUS_CLKLPASS_SLIMBUS_DATA0LPASS_SLIMBUS_DATA1BT_FM_SLIMBUS_DATABT_FM_SLIMBUS_CLKNCRF_LCD_ID_ENNCNCNCNCSW_SERVICETX_GTR_THRES_INHW_ID0HW_ID1NCNCTS_I2C_SDATS_I2C_SCLTS_RESET_NNCNCNFC_IRQNFC_DWLD_ENDISP_RESET_NTRAY2_DETCAM_SOFRFFE6_CLKRFFE6_DATADEBUG_GPIO0DEBUG_GPIO1GRFC4NCNCRSVDUIM2_DATAUIM2_CLKUIM2_RESETUIM2_PRESENTUIM1_DATAUIM1_CLKUIM1_RSTUIM1_PRESENTUIM_BATT_ALARMRSVDNCNCACCEL_INTGYRO_INTCOMPASS_INTALS_PROX_INT_NFP_INT_NNCBAROMETER_INTACC_COVER_OPENTS_INT_NNCNCUSB_DETECT_ENNCQLINK_REQUESTQLINK_ENABLENCTS_VDDIO_ENWMSS_RESET_NPA_INDICATOR_ORNCRFFE3_DATARFFE3_CLKRFFE4_DATARFFE4_CLKRFFE5_DATARFFE5_CLKGNSS_ENMSS_LTE_COXM_TXDMSS_LTE_COXM_RXDRFFE2_DATARFFE2_CLKRFFE1_DATARFFE1_CLK)sdc2-on-stateiclk-pins bsdc2_clkgvcmd-pins bsdc2_cmdg data-pins bsdc2_datag sdc2-off-statekclk-pins bsdc2_clkgvcmd-pins bsdc2_cmdgdata-pins bsdc2_datagsdc2-cd-statebgpio95gpiogjblsp1-uart3-on-statemtx-pinsbgpio45 blsp_uart3_agvrx-pinsbgpio46 blsp_uart3_agvcts-pinsbgpio47 blsp_uart3_agvrfr-pinsbgpio48 blsp_uart3_agvblsp1-i2c1-default-state bgpio2gpio3 blsp_i2c1gvqblsp1-i2c1-sleep-state-state bgpio2gpio3 blsp_i2c1grblsp1-i2c2-default-statebgpio32gpio33 blsp_i2c2gvsblsp1-i2c2-sleep-state-statebgpio32gpio33 blsp_i2c2gtblsp1-i2c3-default-statebgpio47gpio48 blsp_i2c3gvublsp1-i2c3-sleep-statebgpio47gpio48 blsp_i2c3gvblsp1-i2c4-default-statebgpio10gpio11 blsp_i2c4gvwblsp1-i2c4-sleep-statebgpio10gpio11 blsp_i2c4gxblsp1-i2c5-default-statebgpio87gpio88 blsp_i2c5gvyblsp1-i2c5-sleep-statebgpio87gpio88 blsp_i2c5gvzblsp1-i2c6-default-statebgpio43gpio44 blsp_i2c6gv~blsp1-i2c6-sleep-statebgpio43gpio44 blsp_i2c6gblsp1-spi-b-default-statebgpio23gpio28 blsp1_spi_bgvblsp1-spi1-default-statebgpio0gpio1gpio2gpio3 blsp_spi1gvblsp1-spi2-default-statebgpio31gpio34gpio32gpio33 blsp_spi2gvblsp1-spi3-default-statebgpio45gpio46gpio47gpio48 blsp_spi2gvblsp1-spi4-default-statebgpio8gpio9gpio10gpio11 blsp_spi4gvblsp1-spi5-default-statebgpio85gpio86gpio87gpio88 blsp_spi5gvblsp1-spi6-default-statebgpio41gpio42gpio43gpio44 blsp_spi6gvblsp2-i2c1-default-statebgpio55gpio56 blsp_i2c7gvblsp2-i2c1-sleep-statebgpio55gpio56 blsp_i2c7gblsp2-i2c2-default-state bgpio6gpio7 blsp_i2c8gvblsp2-i2c2-sleep-state bgpio6gpio7 blsp_i2c8gblsp2-i2c3-default-statebgpio51gpio52 blsp_i2c9gvblsp2-i2c3-sleep-statebgpio51gpio52 blsp_i2c9gblsp2-i2c4-default-statebgpio67gpio68 blsp_i2c10gvblsp2-i2c4-sleep-statebgpio67gpio68 blsp_i2c10gblsp2-i2c5-default-statebgpio60gpio61 blsp_i2c11gvblsp2-i2c5-sleep-statebgpio60gpio61 blsp_i2c11gblsp2-i2c6-default-statebgpio83gpio84 blsp_i2c12gvblsp2-i2c6-sleep-statebgpio83gpio84 blsp_i2c12gblsp2-spi1-default-statebgpio53gpio54gpio55gpio56 blsp_spi7gvblsp2-spi2-default-statebgpio4gpio5gpio6gpio7 blsp_spi8gvblsp2-spi3-default-statebgpio49gpio50gpio51gpio52 blsp_spi9gvblsp2-spi4-default-statebgpio65gpio66gpio67gpio68 blsp_spi10gvblsp2-spi5-default-statebgpio58gpio59gpio60gpio61 blsp_spi11gvblsp2-spi6-default-statebgpio81gpio82gpio83gpio84 blsp_spi12gvmdp-vsync-p-statebgpio10 mdp_vsync_agnfc-ven-statebgpio12gpiovgcam-mclk0-active-statebgpio13 cam_mclkgvcam-mclk1-active-statebgpio14 cam_mclkgvcci0-default-statebgpio18gpio19cci_i2cvgcci1-default-statebgpio19gpio20cci_i2cvgmain-cam-pwr-en-default-statebgpio21gpiovgtof-int-n-statebgpio22gpiogchat-cam-pwr-en-default-statebgpio25gpiovgtof-reset-statebgpio27gpiovgcc-dir-active-statebgpio38gpiovgacc-cover-open-statebgpio124gpiovgts-int-n-statebgpio125gpiog{usb-detect-en-active-statebgpio128gpiovgts-vddio-en-default-statebgpio133gpiovgremoteproc@4080000Lqcom,msm8998-mss-pilp  qdsp6rmbL.....0wdogfatalreadyhandoverstop-ackshutdown-ack@5''$''''2lifacebusmemgpll0_msssnoc_aximnoc_axiqdssxo/stop'l mss_restart00P@11cxmx [disabledmba2mpss3metadata4glink-edge 5modem Qgpu@5000000Lqcom,adreno-540.1qcom,adrenopkgsl_3d0_reg_memory05'M5''K55)lifacerbbmtimermemmem_ifacerbcprcore 5,671 [disabledopp-tableLoperating-points-v27opp-710000097 *Qopp-670000048 'c@opp-596000097 #=aopp-515000097 G!opp-414000000 #opp-342000000 b@opp-257000000 Q@0iommu@5040000"Lqcom,msm8998-smmu-v2qcom,smmu-v2p5'M''Klifacememmem_iface $5IJK56clock-controller@5065000Lqcom,msm8998-gpuccxpP5' lxogpll05remoteproc@5800000Lqcom,msm8998-slpi-pasp@@@8888#wdogfatalreadyhandoverstop-ack.95lxo:;stop1ssc_cx [disabledglink-edge 5dsps Qstm@6002000 Larm,coresight-stmarm,primecellp (stm-basestm-stimulus-base [disabled5 lapb_pclkatclkout-portsportendpoint8<>funnel@6041000+Larm,coresight-dynamic-funnelarm,primecellp [disabled5 lapb_pclkatclkout-portsportendpoint8=Bin-ports,port@7pendpoint8><funnel@6042000+Larm,coresight-dynamic-funnelarm,primecellp  [disabled5 lapb_pclkatclkout-portsportendpoint8?Cin-ports,port@6pendpoint8@Vfunnel@6045000+Larm,coresight-dynamic-funnelarm,primecellpP [disabled5 lapb_pclkatclkout-portsportendpoint8AGin-ports,port@0pendpoint8B=port@1pendpoint8C?replicator@6046000/Larm,coresight-dynamic-replicatorarm,primecellp` [disabled5 lapb_pclkatclkout-portsportendpoint8DHin-portsportendpoint8EFetf@6047000 Larm,coresight-tmcarm,primecellpp [disabled5 lapb_pclkatclkout-portsportendpoint8FEin-portsportendpoint8GAetr@6048000 Larm,coresight-tmcarm,primecellp [disabled5 lapb_pclkatclkHin-portsportendpoint8HDetm@7840000"Larm,coresight-etm4xarm,primecellp [disabled5 lapb_pclkatclk out-portsportendpoint8INetm@7940000"Larm,coresight-etm4xarm,primecellp [disabled5 lapb_pclkatclk out-portsportendpoint8JOetm@7a40000"Larm,coresight-etm4xarm,primecellp [disabled5 lapb_pclkatclk out-portsportendpoint8KPetm@7b40000"Larm,coresight-etm4xarm,primecellp [disabled5 lapb_pclkatclkout-portsportendpoint8LQfunnel@7b60000"Larm,coresight-etm4xarm,primecellp [disabled5 lapb_pclkatclkout-portsportendpoint8MWin-ports,port@0pendpoint8NIport@1pendpoint8OJport@2pendpoint8PKport@3pendpoint8QLport@4pendpoint8RXport@5pendpoint8SYport@6pendpoint8TZport@7pendpoint8U[funnel@7b70000+Larm,coresight-dynamic-funnelarm,primecellp [disabled5 lapb_pclkatclkout-portsportendpoint8V@in-portsportendpoint8WMetm@7c40000"Larm,coresight-etm4xarm,primecellp [disabled5 lapb_pclkatclkout-portsportendpoint8XRetm@7d40000"Larm,coresight-etm4xarm,primecellp [disabled5 lapb_pclkatclkout-portsportendpoint8YSetm@7e40000"Larm,coresight-etm4xarm,primecellp [disabled5 lapb_pclkatclkout-portsportendpoint8ZTetm@7f40000"Larm,coresight-etm4xarm,primecellp [disabled5 lapb_pclkatclkout-portsportendpoint8[Usram@290000Lqcom,rpm-statsp)spmi@800f000Lqcom,spmi-pmic-arb(p@ @ @"0corechnlsobsrvrintrcnfg periph_irq 5F[c,CXpmic@4Lqcom,pm8005qcom,spmi-pmicp,gpio@c000 Lqcom,pm8005-gpioqcom,spmi-gpiop!\1CXREAR_ENNCSLBOPTION_1_PM8005\pmic@5Lqcom,pm8005qcom,spmi-pmicp,regulatorsLqcom,pm8005-regulatorss1oppmic@0Lqcom,pm8998qcom,spmi-pmicp,pon@800Lqcom,pm8998-ponppwrkeyLqcom,pm8941-pwrkey5= tresinLqcom,pm8941-resin5=  [disabledtemp-alarm@2400Lqcom,spmi-temp-alarmp$5$]thermal$charger@2800*Lqcom,pm8998-coincellqcom,pm8941-coincellp( [disabledadc@3100Lqcom,spmi-adc-rev2p151,]channel@6p die_tempadc-tm@3400Lqcom,spmi-adc-tm-hcp454, [disabledrtc@6000Lqcom,pm8941-rtcp`a rtcalarm5agpio@c000 Lqcom,pm8998-gpioqcom,spmi-gpiop!1CXRUIM_BATT_ALARMNCWLAN_SW_CTRL (DISALLOWED)SSC_PWR_ENVOL_DOWN_NVOL_UP_NSNAPSHOT_NFOCUS_NFLASH_THERMDIV_CLK1NCNC (DISALLOWED)DIV_CLK3NCNCNCNC (DISALLOWED)NFC_CLK_REQNC (DISALLOWED)WCSS_PWR_REQOPTION_1 (DISALLOWED)OPTION_2 (DISALLOWED)PM_SLB (DISALLOWED)vol-down-n-statebgpio5normal  vol-up-n-statebgpio6normal  focus-n-statebgpio7normal  snapshot-n-statebgpio8normal  div-clk1-statebgpio13func2 "pmic@1Lqcom,pm8998qcom,spmi-pmicp,pmic@2Lqcom,pmi8998qcom,spmi-pmicp,charger@1000Lqcom,pmi8998-chargerp@5-usb-pluginbat-ovwdog-barkusbin-icl-change^^usbin_iusbin_v [disabledgpio@c000!Lqcom,pmi8998-gpioqcom,spmi-gpiop!_1CXRMAIN_CAM_PWR_IO_ENNCNCTYPEC_UUSB_SELVIB_LDO_ENNCDISPLAY_TYPE_SELUSB_SWITCH_SELNC4K_DISP_DCDC_ENNCDIV_CLK3SPMI_I2C_SELNC_main-cam-pwr-io-en-statebgpio1normalv /  "vib-ldo-en-statebgpio5normalv /  "4k-disp-dcdc-en-statebgpio10normalv / ? " adc@4500Lqcom,pmi8998-rradcpE^pmic@3Lqcom,pmi8998qcom,spmi-pmicp,labibbLqcom,pmi8998-lab-ibbibb 5 sc-errocp K 5 b 5p y   X   ,oUsUslab 5 sc-errocp K @ b @p y   P  oX@X@ 5pwmLqcom,pmi8998-lpg, H[okay Smulti-led e status,led@3p eled@4p eled@5p eled-controller@d300+Lqcom,pmi8998-flash-ledqcom,spmi-flash-ledp [disabledleds@d800Lqcom,pmi8998-wledp 5 ovpshort backlight [disabledusb@a8f8800Lqcom,msm8998-dwc3qcom,dwc3p [okay,t(5'G't' 'v'u#lcfg_noccoreifacesleepmock_utmi k'u't {$'$5[pwr_eventqusb2_physs_phy_irq''usb@a800000 Lsnps,dwc3p  5   L`aQusb2-phyusb3-phy   peripheral bphy@c010000Lqcom,msm8998-qmp-usb3-phyp  5'w''y'xlauxrefcfg_ahbpipe usb3_phy_pipe_clk_src'E'F phyphy_phy cD[okay*+aphy@c012000Lqcom,msm8998-qusb2-phyp  [okay5'y' lcfg_ahbref'j &de 2f`mmc@c0a4900%Lqcom,msm8998-sdhciqcom,sdhci-msm-v4p I @hccore5}hc_irqpwr_irqlifacecorexo5'e'f G[okay Q)_ Zg fh'defaultsleepij skjdma-controller@c144000Lqcom,bam-v1.7.0p @P 55'%lbam_clk }[   lserial@c171000%Lqcom,msm-uartdm-v1.4qcom,msm-uartdmp  5m5'5'% lcoreiface ll txrx'defaultm[okaybluetoothLqcom,wcn3990-bt  n o p 05i2c@c175000Lqcom,i2c-qup-v2.2.1p P 5_5'&'% lcoreiface ll txrx'defaultsleepq sr [disabled,i2c@c176000Lqcom,i2c-qup-v2.2.1p ` 5`5'('% lcoreiface ll  txrx'defaultsleeps st [disabled,i2c@c177000Lqcom,i2c-qup-v2.2.1p p 5a5'*'% lcoreiface l l  txrx'defaultsleepu sv [disabled,i2c@c178000Lqcom,i2c-qup-v2.2.1p  5b5','% lcoreiface l l  txrx'defaultsleepw sx [disabled,i2c@c179000Lqcom,i2c-qup-v2.2.1p  5c5'.'% lcoreiface ll txrx'defaultsleepy szj[okay,touchscreen@2cLsyna,rmi4-i2cp,, )}'default{ | }  3rmi4-f01@1p Irmi4-f11@11p [i2c@c17a000Lqcom,i2c-qup-v2.2.1p  5d5'0'% lcoreiface ll txrx'defaultsleep~ s [disabled,spi@c175000Lqcom,spi-qup-v2.2.1p P 5_5'''% lcoreiface ll txrx'default [disabled,spi@c176000Lqcom,spi-qup-v2.2.1p ` 5`5')'% lcoreiface ll  txrx'default [disabled,spi@c177000Lqcom,spi-qup-v2.2.1p p 5a5'+'% lcoreiface l l  txrx'default [disabled,spi@c178000Lqcom,spi-qup-v2.2.1p  5b5'-'% lcoreiface l l  txrx'default [disabled,spi@c179000Lqcom,spi-qup-v2.2.1p  5c5'/'% lcoreiface ll txrx'default [disabled,spi@c17a000Lqcom,spi-qup-v2.2.1p  5d5'1'% lcoreiface ll txrx'default [disabled,dma-controller@c184000Lqcom,bam-v1.7.0p @P 55'6lbam_clk }[   serial@c1b0000%Lqcom,msm-uartdm-v1.4qcom,msm-uartdmp  5r5'E'6 lcoreiface[okayi2c@c1b5000Lqcom,i2c-qup-v2.2.1p P 5e5'7'6 lcoreiface  txrx'defaultsleep s [disabled,i2c@c1b6000Lqcom,i2c-qup-v2.2.1p ` 5f5'9'6 lcoreiface   txrx'defaultsleep s[okay,proximity@29 Lst,vl53l0xp))5 l) 'defaulti2c@c1b7000Lqcom,i2c-qup-v2.2.1p p 5g5';'6 lcoreiface  txrx'defaultsleep s [disabled,i2c@c1b8000Lqcom,i2c-qup-v2.2.1p  5h5'='6 lcoreiface  txrx'defaultsleep s [disabled,i2c@c1b9000Lqcom,i2c-qup-v2.2.1p  5i5'?'6 lcoreiface  txrx'defaultsleep s [disabled,i2c@c1ba000Lqcom,i2c-qup-v2.2.1p  5j5'A'6 lcoreiface  txrx'defaultsleep s [disabled,spi@c1b5000Lqcom,spi-qup-v2.2.1p P 5e5'8'6 lcoreiface  txrx'default [disabled,spi@c1b6000Lqcom,spi-qup-v2.2.1p ` 5f5':'6 lcoreiface   txrx'default [disabled,spi@c1b7000Lqcom,spi-qup-v2.2.1p p 5g5'<'6 lcoreiface  txrx'default [disabled,spi@c1b8000Lqcom,spi-qup-v2.2.1p  5h5'>'6 lcoreiface  txrx'default [disabled,spi@c1b9000Lqcom,spi-qup-v2.2.1p  5i5'@'6 lcoreiface  txrx'default [disabled,spi@c1ba000Lqcom,spi-qup-v2.2.1p  5j5'B'6 lcoreiface  txrx'default [disabled,clock-controller@c8c0000Lqcom,mmcc-msm8998xp Jlxogpll0dsi0dsidsi0bytedsi1dsidsi1bytehdmiplldplinkdpvcogpll0_divD5''display-subsystem@c900000Lqcom,msm8998-mdssp mdss 5SCX5>@Clifacebuscore,t [disableddisplay-controller@c901000Lqcom,msm8998-dpu p   @mdpregdmavbifvbif_nrt5(5>@CFlifacebusmnoccorevsync kF {$1opp-tableLoperating-points-v2opp-171430000 7p'opp-275000000 d*'opp-330000000 f'opp-412500000 @ 'ports,port@0pendpoint8port@1pendpoint8dsi@c994000)Lqcom,msm8998-dsi-ctrlqcom,mdss-dsi-ctrlp @ dsi_ctrl505HRAJ>@$lbytebyte_intfpixelcoreifacebus k/ x1LQdsi, [disabledports,port@0pendpoint8port@1pendpointphy@c994400Lqcom,dsi-phy-10nm-8998p D F Jdsi_phydsi_phy_lanedsi_pll5> lifaceref [disableddsi@c996000)Lqcom,msm8998-dsi-ctrlqcom,mdss-dsi-ctrlp ` dsi_ctrl505ISBK>@$lbytebyte_intfpixelcoreifacebus k0 x1LQdsi, [disabledports,port@0pendpoint8port@1pendpointphy@c996400Lqcom,dsi-phy-10nm-8998p d f jdsi_phydsi_phy_lanedsi_pll5> lifaceref [disabledvideo-codec@cc00000Lqcom,msm8998-venusp  5 589:;lcoreifacebusmbus     !()+,-1 [disabledvideo-decoderLvenus-decoder5<lcorevideo-encoderLvenus-encoder5=lcoreiommu@cd00000"Lqcom,msm8998-smmu-v2qcom,smmu-v2p 5liface-mmiface-smmubus-smmu 5    remoteproc@17300000Lqcom,msm8998-adsp-pasp0@@@#wdogfatalreadyhandoverstop-ack5lxostop1cx [disabledglink-edge 5lpass Q mailbox@17911000<Lqcom,msm8998-apcs-hmss-globalqcom,msm8994-apcs-kpss-globalp timer@17920000,tLarm,armv7-timer-mempframe@17921000 5p frame@17923000  5 p0 [disabledframe@17924000  5 p@ [disabledframe@17925000  5 pP [disabledframe@17926000  5 p` [disabledframe@17927000  5 pp [disabledframe@17928000  5p [disabledinterrupt-controller@17a00000 Larm,gic-v3pX,tC   5 wifi@18800000Lqcom,wcn3990-wifi [disabledpmembase5lcxo_ref_clk_pin5  vbat-regulatorLregulator-fixed VBATo= =  cam0-vdigLregulator-fixed cam0_vdig / @ S)'defaultcam1-vdigLregulator-fixed cam1_vdig / @ S)'default Xcam-vio-vregLregulator-fixed cam_vio_vreg / @ S_'default Xtouch-vddio-vregLregulator-fixed touch_vddio_vreg /' S)'default}vph-pwr-regulatorLregulator-fixed vph_pwr extcon-usbLlinux,extcon-usb-gpio c)& l)'defaultbgpio-keys Lgpio-keys Side buttons'defaultbutton-camera-focus Camera Focus C wbutton-camera-snapshotCamera Snapshot C wbutton-vol-down Volume Down Cr  wbutton-vol-up Volume Up Cs  wgpio-hall-sensor Lgpio-keys Hall sensors'defaultevent-hall-sensor0Cover Hall Sensor C)|   wvibratorLgpio-vibrator <_'defaultdisp-dvdd-vregLregulator-fixed disp_dvdd_enopp / @ S_ 'default interrupt-parentqcom,msm-id#address-cells#size-cellsqcom,board-idmodelcompatiblechassis-typedevice_typeregrangesno-mapphandleqcom,client-idqcom,vmidalloc-rangessizerecord-sizeconsole-sizeftrace-sizepmsg-sizeecc-size#clock-cellsclock-frequencyclock-output-namespinctrl-0pinctrl-namesclocksenable-gpiosenable-methodcapacity-dmips-mhzcpu-idle-statesnext-level-cachecache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-hzrequired-oppsinterruptsqcom,rpm-msg-rammboxesqcom,glink-channelsclock-names#power-domain-cellsoperating-points-v2opp-levelvdd_s1-supplyvdd_s2-supplyvdd_s3-supplyvdd_s4-supplyvdd_s5-supplyvdd_s6-supplyvdd_s7-supplyvdd_s8-supplyvdd_s9-supplyvdd_s10-supplyvdd_s11-supplyvdd_s12-supplyvdd_s13-supplyvdd_l1_l27-supplyvdd_l2_l8_l17-supplyvdd_l3_l11-supplyvdd_l4_l5-supplyvdd_l6-supplyvdd_l7_l12_l14_l15-supplyvdd_l9-supplyvdd_l10_l23_l25-supplyvdd_l13_l19_l21-supplyvdd_l16_l28-supplyvdd_l18_l22-supplyvdd_l20_l24-supplyvdd_l26-supplyvdd_lvs1_lvs2-supplyregulator-min-microvoltregulator-max-microvoltregulator-system-loadregulator-allow-set-loadvdd_bob-supplymemory-regionhwlocksqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellspolling-delay-passivethermal-sensorstemperaturehysteresis#reset-cellsprotected-clocksbits#qcom,sensorsinterrupt-names#thermal-sensor-cells#iommu-cells#global-interruptsreg-nameslinux,pci-domainbus-rangenum-lanesphysphy-namesstatusinterrupt-map-maskinterrupt-mappower-domainsiommu-mapperst-gpios#phy-cellsresetsreset-namesvdda-phy-supplyvdda-pll-supplylanes-per-directionfreq-table-hz#hwlock-cellsgpio-rangesgpio-controller#gpio-cellsgpio-reserved-rangesgpio-line-namespinsdrive-strengthbias-disablebias-pull-upfunctionbias-pull-downoutput-lowinterrupts-extendedqcom,smem-statesqcom,smem-state-namesqcom,halt-regspower-domain-nameslabeliommusopp-supported-hwpx-supplyremote-endpointarm,scatter-gatherqcom,eeqcom,channelregulator-enable-ramp-delayregulator-always-onmode-bootloadermode-recoverydebouncelinux,codeio-channelsio-channel-names#io-channel-cellsinput-enableqcom,drive-strengthpower-sourcedrive-push-pulloutput-highregulator-min-microampregulator-max-microampregulator-over-current-protectionregulator-pull-downregulator-ramp-delayregulator-settling-time-up-usregulator-settling-time-down-usregulator-soft-startqcom,discharge-resistor-kohmsqcom,soft-start-us#pwm-cellsqcom,power-sourcecolorassigned-clocksassigned-clock-ratessnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,parkmode-disable-ss-quirksnps,has-lpm-erratumsnps,hird-thresholddr_modeextconqcom,tcsr-regnvmem-cellsvdda-phy-dpdm-supplybus-widthcd-gpiosvmmc-supplyvqmmc-supplypinctrl-1#dma-cellsqcom,controlled-remotelynum-channelsqcom,num-eesdmasdma-namesvddio-supplyvddxo-supplyvddrf-supplyvddch0-supplymax-speedvdd-supplyvio-supplysyna,reset-delay-mssyna,startup-delay-mssyna,nosleep-modesyna,sensor-typereset-gpiosassigned-clock-parents#mbox-cellsframe-number#redistributor-regionsredistributor-strideqcom,snoc-host-cap-8bit-quirkqcom,no-msa-ready-indicatorregulator-nameregulator-boot-onstartup-delay-usenable-active-highgpiovin-supplyid-gpiosvbus-gpiosdebounce-intervalwakeup-sourcelinux,input-type