58(L (,Qualcomm Technologies, Inc. QDU1000 IDP2qcom,qdu1000-idpqcom,qdu1000 =embeddedchosenJserial0:115200n8cpus cpu@0Vcpu2arm,cortex-a55bfmpsci{psci l2-cache2cachel3-cache2cachecpu@100Vcpu2arm,cortex-a55bfmpsci{psci l2-cache2cachecpu@200Vcpu2arm,cortex-a55bfmpsci{psci l2-cache2cache cpu@300Vcpu2arm,cortex-a55bfmpsci{ psci l2-cache2cache cpu-mapcluster0core0 core1 core2core3idle-statespscicpu-sleep-02arm,idle-state^$@;domain-idle-statescluster-sleep-02domain-idle-stateH $ADcluster-sleep-12domain-idle-state M'$A3Dfirmwarescm2qcom,scm-qdu1000qcom,scminterconnect-02qcom,qdu1000-mc-virtL\Hinterconnect-12qcom,qdu1000-clk-virtL\memory@80000000Vmemorybpmu2arm,cortex-a55-pmu ppsci 2arm,psci-1.0tsmcpower-domain-cpu0{{power-domain-cpu1{{power-domain-cpu2{{power-domain-cpu3{{ power-domain-cluster{reserved-memory hyp@80000000b`xbl-dt-log@80600000b`xbl-ramdump@80640000bdaop-image@80800000baop-cmd-db@80860000 2qcom,cmd-dbbaop-config@80880000btme-crash-dump@808a0000btme-log@808e0000b@uefi-log@808e4000b@smem@80900000 2qcom,smemb cpucp-fw@80b00000bmemory@80c00000btz-stat@81d00000btags@81e00000bPqtee@82300000b0Pta@82800000bfs1@83200000b @fs2@83600000b`@fs3@83a00000b@ipa-fw@8be00000bipa-gsi@8be10000b@mpss@8c000000bq6-mpss-dtb@9ec00000btenx@a0000000b`oem-tenx@b9600000b`tenx-q6-buffer@c0000000b ipa-buffer@c3200000b ecc-meta-data@e0000000b harq-buffer@800000000btenx-sp-buffer@880000000bPfapi-buffer@8d0000000b soc@0 2simple-bus clock-controller@800002qcom,qdu1000-gccbBf{clock-controller@2800002qcom,qdu1000-ecpriccb(8fdma-controller@900000)2qcom,qdu1000-gpi-dmaqcom,sm6350-gpi-dmabp ? geniqup@9c00002qcom,geni-se-qupb fZ[  m-ahbs-ahb  'qup-core :okayserial@9800002qcom,geni-uartb@f8 seAKdefault pY :disabledi2c@9840002qcom,geni-i2cb@@f: se pZAKdefault  :disabledspi@9840002qcom,geni-spib@@  pZf: seAKdefault :disabledi2c@9880002qcom,geni-i2cb@f< se p[AKdefault  :disabledspi@9880002qcom,geni-spib@  p[f< seA !Kdefault :disabledi2c@98c0002qcom,geni-i2cb@f> se p\A"Kdefault  :disabledspi@98c0002qcom,geni-spib@  p\f> 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sdc1_clkcmd-pins sdc1_cmd data-pins sdc1_data rclk-pins sdc1_rclksdc-off-stateMclk-pins sdc1_clkcmd-pins sdc1_cmddata-pins sdc1_datarclk-pins sdc1_rclksram@14680000$2qcom,qdu1000-imemsysconsimple-mfdbhh pil-reloc@94c2qcom,pil-reloc-infob Liommu@1500000002qcom,qdu1000-smmu-500qcom,smmu-500arm,mmu-500bLpAI^_`abcdefghijklmnopqrstuv;<=>?@Ainterrupt-controller@17200000 2arm,gic-v3 b & p -timer@174200002arm,armv7-timer-membB  frame@17421000bBB pBframe@17423000bB0 p B :disabledframe@17425000bBPB` p B :disabledframe@17427000bBp p B :disabledframe@17429000bB p B :disabledframe@1742b000bB p B :disabledframe@1742d000bB pB :disabledrsc@17a000002qcom,rpmh-rsc0bgdrv-0drv-1drv-2$pO _ k lapps_rsc{bcm-voter2qcom,bcm-voterclock-controller2qcom,qdu1000-rpmh-clkf[ xopower-controller2qcom,qdu1000-rpmhpd{\Jopp-table2operating-points-v2\opp1{opp2{0opp3{@opp4{opp5{opp6{Popp7{@opp8{Popp9{opp10{regulators2qcom,pm8150-rpmh-regulatorsa]]]]]]]]]]^4]F_^^o`]smps2 vreg_s2a_0p5smps3vreg_s3a_1p05~Psmps4 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interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typestdout-pathdevice_typeregclocksenable-methodpower-domainspower-domain-namesqcom,freq-domainsnext-level-cachephandlecache-levelcache-unifiedcpuentry-methodentry-latency-usexit-latency-usmin-residency-usarm,psci-suspend-paramlocal-timer-stopqcom,bcm-voters#interconnect-cellsinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksdma-ranges#clock-cells#reset-cellsdma-channelsdma-channel-maskiommus#dma-cellsclock-namesinterconnectsinterconnect-namesstatuspinctrl-0pinctrl-names#hwlock-cellsreg-namesinterrupt-namesresetsoperating-points-v2dma-coherentbus-widthqcom,dll-configqcom,ddr-configpinctrl-1cap-mmc-hw-resetmmc-ddr-1_8vmmc-hs200-1_8vmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removableno-sdno-sdiosupports-cqevmmc-supplyvqmmc-supplyopp-hzrequired-oppsopp-peak-kBpsopp-avg-kBps#phy-cellsvdda-pll-supplyvdda18-supplyvdda33-supplyreset-namesclock-output-namesvdda-phy-supplyassigned-clocksassigned-clock-ratesinterrupts-extendedsnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkphysphy-namesdr_modeqcom,pdc-ranges#interrupt-cellsinterrupt-controllerqcom,eeqcom,channelmode-bootloadermode-recoverydebouncebias-pull-uplinux,codeio-channelsio-channel-names#thermal-sensor-cells#io-channel-cellsqcom,pre-scalinglabelgpio-controllergpio-ranges#gpio-cellswakeup-parentgpio-reserved-rangespinsfunctiondrive-strengthbias-disablebias-pull-down#iommu-cells#global-interrupts#redistributor-regionsredistributor-strideframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configopp-levelqcom,pmic-idvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-s7-supplyvdd-s8-supplyvdd-s9-supplyvdd-s10-supplyvdd-l1-l8-l11-supplyvdd-l2-l10-supplyvdd-l3-l4-l5-l18-supplyvdd-l6-l9-supplyvdd-l7-l12-l14-l15-supplyvdd-l13-l16-l17-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-mode#freq-domain-cellsnvmem-cellsnvmem-cell-namesbitspolling-delay-passivethermal-sensorstemperaturehysteresisserial0clock-frequencyregulator-always-onregulator-boot-onvin-supply