P8(  ,Qualcomm SA8540P Ride2qcom,sa8540p-rideqcom,sa8540pclocksxo-board-clk 2fixed-clock=JIZsleep-clk 2fixed-clock=JZ4cpus cpu@0bcpu2arm,cortex-a78cnrypsci%psci Zl2-cache2cache(4Zl3-cache2cache(4Zcpu@100bcpu2arm,cortex-a78cnrypsci% psci Zl2-cache2cache(4Zcpu@200bcpu2arm,cortex-a78cnrypsci%  psci Zl2-cache2cache(4Z cpu@300bcpu2arm,cortex-a78cnrypsci%  psci Zl2-cache2cache(4Z cpu@400bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@500bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@600bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu@700bcpu2arm,cortex-x1cnrypsciNpsci Zl2-cache2cache(4Zcpu-mapcluster0core0Bcore1Bcore2Bcore3Bcore4Bcore5Bcore6Bcore7Bidle-statesFpscicpu-sleep-0-02arm,idle-stateSlittle-rail-power-collapsec@zc^Z&cpu-sleep-1-02arm,idle-stateSbig-rail-power-collapsec@zZ'domain-idle-statescluster-sleep-02domain-idle-statecADz 'Z(firmwarescm2qcom,scm-sc8280xpqcom,scm  !0interconnect-aggre1-noc2qcom,sc8280xp-aggre1-noc"Z@interconnect-aggre2-noc2qcom,sc8280xp-aggre2-noc"Zinterconnect-clk-virt2qcom,sc8280xp-clk-virt"Z=interconnect-config-noc2qcom,sc8280xp-config-noc"Z?interconnect-dc-noc2qcom,sc8280xp-dc-noc"interconnect-gem-noc2qcom,sc8280xp-gem-noc"Z>interconnect-lpass-ag-noc2qcom,sc8280xp-lpass-ag-noc"interconnect-mc-virt2qcom,sc8280xp-mc-virt"Z interconnect-mmss-noc2qcom,sc8280xp-mmss-noc"Zinterconnect-nspa-noc2qcom,sc8280xp-nspa-noc"Zinterconnect-nspb-noc2qcom,sc8280xp-nspb-noc"Zinterconnect-system-noc2qcom,sc8280xp-system-noc"memory@80000000bmemorynopp-table-cpu02operating-points-v2Zopp-300000000|opp-403200000Xopp-4992000000`opp-595200000#z@opp-8064000000wopp-9024000005Ɉopp-1017600000Hopp-1171200000E;opp-1286400000Lt opp-1401600000Sopp-1516800000Zh@opp-1632000000aFX opp-1747200000h$( opp-1862400000oB`opp-1977600000uB`opp-2073600000{B`opp-2169600000QxB`opp-2284800000/HB`opp-2496000000B`opp-2592000000~B`opp-2380800000 B`opp-table-qup100mhz2operating-points-v2ZAopp-75000000xh#opp-100000000$pmu2arm,armv8-pmuv3 psci 2arm,psci-1.0smcpower-domain-cpu0*%>&Zpower-domain-cpu1*%>&Z power-domain-cpu2*%>&Z power-domain-cpu3*%>&Z power-domain-cpu4*%>'Zpower-domain-cpu5*%>'Zpower-domain-cpu6*%>'Zpower-domain-cpu7*%>'Zpower-domain-cpu-cluster0*>(Z%reserved-memory Qreserved-region@80000000nXcmd-db-region@80860000 2qcom,cmd-dbnXreserved-region@80880000nXsmem-region@80900000 2qcom,smemn X_)reserved-region@80b00000nXreserved-region@83b00000npXreserved-region@85b00000nXadsp-region@86c00000nXZ_cdsp0-region@8a100000nXZcdsp1-region@8c600000n`XZreserved-region@aeb00000n`Xsmp2p-adsp 2qcom,smp2pgq* *master-kernelmaster-kernelZaslave-kernel slave-kernelZ^smp2p-nsp0 2qcom,smp2pg^q* *master-kernelmaster-kernelZslave-kernel slave-kernelZsmp2p-nsp1 2qcom,smp2pgihq* * master-kernelmaster-kernelZslave-kernel slave-kernelZsoc@0 2simple-bus Qethernet@200002qcom,sc8280xp-ethqos n`stmmacethrgmii r+3+8+4+6 stmmacethpclkptp_refrgmiimacirqeth_lpi ),+ 09 BP^okaye-x./ rgmii-txiddefault0mdio2snps,dwmac-mdio phy@82ethernet-phy-id0141.0dd4n q1 2*p bethernet-phy Z/rx-queues-configZ-queue0':R`queue1':nqueue2}:queue3}:` tx-queues-configZ.queue0'queue1'queue2}queue3}clock-controller@1000002qcom,gcc-sc8280xpn=*r3456789:;<Z+mailbox@4080002qcom,sc8280xp-ipccqcom,ipccn@ Z*efuse@784000!2qcom,sc8280xp-qfpromqcom,qfpromnx@0 gpu-speed-bin@18bn!geniqup@8c00002qcom,geni-se-qupn r++  m-ahbs-ahb ), Q^okayi2c@8800002qcom,geni-i2cn@ r+ se u<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@8800002qcom,geni-spin@ r+ se u<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@8840002qcom,geni-i2cn@@ r+ se G<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@8840002qcom,geni-spin@@ r+ se G<H ==>?.@ &qup-corequp-configqup-memory ^disabledserial@8840002qcom,geni-debug-uartn@@r+ se GA<0 ==>?.&qup-corequp-config^okayi2c@8880002qcom,geni-i2cn@ r+ se H<H ==>?.@ &qup-corequp-configqup-memory^okaydefaultBspi@8880002qcom,geni-spin@ r+ se H<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@88c0002qcom,geni-i2cn@ r+ se I<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@88c0002qcom,geni-spin@ r+ se I<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@8900002qcom,geni-i2cn@ r+ se J<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@8900002qcom,geni-spin@ r+ se J<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@8940002qcom,geni-i2cn@@ ser+ K <H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@8940002qcom,geni-spin@@ r+ se K<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@8980002qcom,geni-i2cn@  ser+ A<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@8980002qcom,geni-spin@ r+ se A<H ==>?.@ &qup-corequp-configqup-memory ^disabledi2c@89c0002qcom,geni-i2cn@  ser+ B<H ==>?.@ &qup-corequp-configqup-memory ^disabledspi@89c0002qcom,geni-spin@ r+ se B<H ==>?.@ &qup-corequp-configqup-memory ^disabledgeniqup@9c00002qcom,geni-se-qupn`r++  m-ahbs-ahb ),c Q^okayi2c@9800002qcom,geni-i2cn@  ser+ Y<H ==>?,@ &qup-corequp-configqup-memory^okaydefaultCspi@9800002qcom,geni-spin@ r+ se Y<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@9840002qcom,geni-i2cn@@  ser+ Z<H ==>?,@ &qup-corequp-configqup-memory^okaydefaultDspi@9840002qcom,geni-spin@@ r+ se Z<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@9880002qcom,geni-i2cn@  ser+ [<H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@9880002qcom,geni-spin@ r+ se [<H ==>?,@ &qup-corequp-configqup-memory ^disabledserial@9880002qcom,geni-uartn@r+ se [A<0 ==>?,&qup-corequp-config ^disabledi2c@98c0002qcom,geni-i2cn@  ser+ \<H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@98c0002qcom,geni-spin@ r+ se \<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@9900002qcom,geni-i2cn@ ser+ ] <H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@9900002qcom,geni-spin@ r+ se ]<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@9940002qcom,geni-i2cn@@  ser+ ^<H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@9940002qcom,geni-spin@@ r+ se ^<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@9980002qcom,geni-i2cn@  ser+ _<H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@9980002qcom,geni-spin@ r+ se _<H ==>?,@ &qup-corequp-configqup-memory ^disabledi2c@99c0002qcom,geni-i2cn@  ser+ `<H ==>?,@ &qup-corequp-configqup-memory ^disabledspi@99c0002qcom,geni-spin@ r+ se `<H ==>?,@ &qup-corequp-configqup-memory ^disabledgeniqup@ac00002qcom,geni-se-qupn`r++  m-ahbs-ahb ), Q^okayi2c@a800002qcom,geni-i2cn@ r+ se a<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a800002qcom,geni-spin@ r+ se a<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a840002qcom,geni-i2cn@@ r+ se b<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a840002qcom,geni-spin@@ r+ se b<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a880002qcom,geni-i2cn@ r+ se c<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a880002qcom,geni-spin@ r+ se c<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a8c0002qcom,geni-i2cn@ r+ se d<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a8c0002qcom,geni-spin@ r+ se d<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a900002qcom,geni-i2cn@ r+ se e<H ==>?-@ &qup-corequp-configqup-memory^okaydefaultEspi@a900002qcom,geni-spin@ r+ se e<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a940002qcom,geni-i2cn@@ r+ se f<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a940002qcom,geni-spin@@ r+ se f<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a980002qcom,geni-i2cn@ r+ se C<H ==>?-@ &qup-corequp-configqup-memory ^disabledspi@a980002qcom,geni-spin@ r+ se C<H ==>?-@ &qup-corequp-configqup-memory ^disabledi2c@a9c0002qcom,geni-i2cn@ r+ se D<H ==>?-@ &qup-corequp-configqup-memory^okaydefaultFspi@a9c0002qcom,geni-spin@ r+ se D<H ==>?-@ &qup-corequp-configqup-memory ^disabledrng@10d3000 2qcom,prng-een 0r3 corepcie@1c00000bpci2qcom,pcie-sa8540p`n000 000parfdbielbiatuconfigmhi 8Q0 00009CPakG msisHr++++++&+ + +$Y auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr_4noc_aggr_south_sfcnoc_qx+$0  >?Q&pcie-memcpu-pcie+ pci+H;pciephy ^disabledpcie@0bpcin9 Qphy@1c06000"2qcom,sc8280xp-qmp-gen3x1-pcie-phyn` 0r++++W++$ auxcfg_ahbrefrchngpipepipediv2+W++#phy=pcie_4_pipe_clk ^disabledZ;pcie@1c08000bpci2qcom,pcie-sa8540p`n022 22parfdbielbiatuconfigmhi 8Q2 20209CPakG  5msis@r++++++&+ + Q auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr_4noc_aggr_south_sf+$0  >?P&pcie-memcpu-pcie+pci+H:pciephy ^disabledpcie@0bpcin9 Qphy@1c0e000"2qcom,sc8280xp-qmp-gen3x2-pcie-phyn 0r++++V++$ auxcfg_ahbrefrchngpipepipediv2+V++phy=pcie_3b_pipe_clk ^disabledZ:pcie@1c10000bpci2qcom,pcie-sa8540pPn0@@ @@parfdbielbiatuconfig TQ@ @ @0@0 9CPakG  7msis @r++++++&+ + Q auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr_4noc_aggr_south_sf+$0  >?O&pcie-memcpu-pcie+pci+H9pciephy^okay 1 18defaultIpcie@0bpcin9 Qphy@1c14000"2qcom,sc8280xp-qmp-gen3x4-pcie-phy n@ ` 0r++++U++$ auxcfg_ahbrefrchngpipepipediv2+U++phy !D=pcie_3a_pipe_clk^okay$J4KZ9pcie@1c18000bpci2qcom,pcie-sa8540p`n088 88parfdbielbiatuconfigmhi 8Q8 80809CPakG  msisw@r+t+v+w+}+~+&+ + Q auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr_4noc_aggr_south_sf+t$0  >?N&pcie-memcpu-pcie+pci+H8pciephy ^disabledpcie@0bpcin9 Qphy@1c1e000"2qcom,sc8280xp-qmp-gen3x2-pcie-phyn 0r+t+v+h+T+y+|$ auxcfg_ahbrefrchngpipepipediv2+T++phy=pcie_2b_pipe_clk ^disabledZ8pcie@1c20000bpci2qcom,pcie-sa8540p`n0<< <<0parfdbielbiatuconfigmhi TQ< < <0<09CPakG  msis@r+i+k+l+r+s+&+ + Q auxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr_4noc_aggr_south_sf+i$0  >?M&pcie-memcpu-pcie+ pci+H7pciephy ^disabled 1 1defaultLpcie@0bpcin9 Qphy@1c24000"2qcom,sc8280xp-qmp-gen3x4-pcie-phy n@ ` 0r+i+k+h+S+n+q$ auxcfg_ahbrefrchngpipepipediv2+S++phy !D=pcie_2a_pipe_clk ^disabled$J4KZ7ufs@1d84000-2qcom,sc8280xp-ufshcqcom,ufshcjedec,ufs-2.0n@0  MufsphyD+1rst+H ),C@r+ + + +++++n core_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@Xxhxh^okay 1fNqOZPphy@1d870002qcom,sc8280xp-qmp-ufs-phynpr3++ refref_auxqref+Pufsphy^okay$Q4RZMufs@1da4000-2qcom,sc8280xp-ufshcqcom,ufshcjedec,ufs-2.0n@0 }SufsphyD+0rst+ ),C@r++ ++ ++++n core_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@Xxhxh ^disabledZTphy@1da70002qcom,sc8280xp-qmp-ufs-phynpr3++ refref_auxqref+Tufsphy ^disabledZShwlock@1f400002qcom,tcsr-mutexn}Z)syscon@1fc00002qcom,sc8280xp-tcsrsysconnZ!gpu@3d000002qcom,adreno-690.0qcom,adreno0n#kgsl_3d0_reg_memorycx_memcx_dbgc ,)U U VW > &gfx-mem ^disabledZopp-table2operating-points-v2ZVopp-270000000߀@opp-410000000p8opp-500000000e8opp-547000000 8opp-606000000$Ӏ)opp-640000000&%@)opp-655000000' )opp-690000000) )gmu@3d6a000&2qcom,adreno-gmu-690.0qcom,adreno-gmu0n֠@ )gmursccgmu_pdc01hfigmu8rXX+%+MXXX% gmucxoaximemnocahbhubsmmu_voteXXcxgx )U YZWopp-table2operating-points-v2ZYopp-200000000 0opp-500000000eclock-controller@3d900002qcom,sc8280xp-gpuccnr3+J+K8 bi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_src=* ^disabledZXiommu@3da0000B2qcom,sc8280xp-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-500n8r+M+NXXXXX gcc_gpu_memnoc_gfx_clkgcc_gpu_snoc_dvm_gfx_clkgpu_cc_ahb_clkgpu_cc_hlos1_vote_gpu_smmu_clkgpu_cc_cx_gmu_clkgpu_cc_hub_cx_int_clkgpu_cc_hub_aon_clkXC ^disabledZUphy@88e500022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynPr3 ref+,^okay4Z[\Z{phy@88e700022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynpr+ ref+(^okay4Z]\Zuphy@88e800022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynr+ ref+) ^disabledZwphy@88e900022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynr+ ref+* ^disabledZyphy@88ea00022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phynr+ ref++ ^disabledZzphy@88ef0002qcom,sc8280xp-qmp-usb3-uni-phyn  r+6+4+8+9 auxrefcom_auxpipe+;+? phyphy_phy+ =usb2_phy0_pipe_clk^okay$K4ZZvphy@88f10002qcom,sc8280xp-qmp-usb3-uni-phyn  r+6+5+8+; auxrefcom_auxpipe+<+@ phyphy_phy+ =usb2_phy1_pipe_clk ^disabledZxremoteproc@30000002qcom,sc8280xp-adsp-pasnLq^^^^^0wdogfatalreadyhandoverstop-ackshutdown-ackr3 xo<<lcxlmx_`astop ^disabledglink-edgeq* *lpassgpr 2qcom,gpr adsp_apps2> service@1 2qcom,q6apmnK\avs/audiomsm/adsp/audio_pddais2qcom,q6apm-dais ), bedais2qcom,q6apm-lpass-daisKservice@2 2qcom,q6prmn\avs/audiomsm/adsp/audio_pdclock-controller2qcom,q6prm-lpass-clocks=Zbrxmacro@32000002qcom,sc8280xp-lpass-rx-macron 4rb@bAbfbgc mclknplmacrodcodecfsgenb@bA$$mclk=Kdefaultd ^disabledZesoundwire@32100002qcom,soundwire-v1.6.0n!  re ifacefswr_audio_cgcrRXs   &>K  ^disabledtxmacro@32200002qcom,sc8280xp-lpass-tx-macron"defaultg4rb9b:bfbgc mclknplmacrodcodecfsgenb9b:$$mclk=K ^disabledZjcodec@32400002qcom,sc8280xp-lpass-wsa-macron$4rbBbCbfbgc mclknplmacrodcodecfsgenbBbC$$=mclkKdefaulth ^disabledZisoundwire@3250000n% 2qcom,soundwire-v1.6.0 ri ifacefswr_audio_cgcrWSAs??    >&K  ^disabledclock-controller@32a90002qcom,sc8280xp-lpassaudioccn*=Zfsoundwire@33300002qcom,soundwire-v1.6.0n3  corewakeuprj ifacekswr_audio_cgcrTXK s >& ^disabledcodec@33700002qcom,sc8280xp-lpass-va-macron70rb9bfbgb: mclkmacrodcodecnpl b9$=fsgenK ^disabledZcpinctrl@33c0000 2qcom,sc8280xp-lpass-lpi-pinctrl n<U[kwlrbfbg  coreaudio ^disabledZltx-swr-default-stateZgclk-pinsgpio0 swr_tx_clkdata-pins gpio1gpio2 swr_tx_datarx-swr-default-stateZdclk-pinsgpio3 swr_rx_clkdata-pins gpio4gpio5 swr_rx_datadmic01-default-stateclk-pinsgpio6 dmic1_clkdata-pinsgpio7 dmic1_datadmic01-sleep-stateclk-pinsgpio6 dmic1_clkdata-pinsgpio7 dmic1_datadmic23-default-stateclk-pinsgpio8 dmic2_clkdata-pinsgpio9 dmic2_datadmic23-sleep-stateclk-pinsgpio8 dmic2_clkdata-pinsgpio9 dmic2_datawsa-swr-default-stateZhclk-pinsgpio10 wsa_swr_clkdata-pinsgpio11 wsa_swr_datawsa2-swr-default-stateclk-pinsgpio15 wsa2_swr_clkdata-pinsgpio16wsa2_swr_dataclock-controller@33e00002qcom,sc8280xp-lpassccn> =Zkmmc@8804000&2qcom,sc8280xp-sdhciqcom,sdhci-msm-v5n@hc_irqpwr_irqr++3 ifacecorexo+.0  >?/&sdhc-ddrcpu-sdhc ),<mC ^disabledopp-table2operating-points-v2Zmopp-100000000#w@ opp-202000000 FnRej  @phy@88eb0002qcom,sc8280xp-qmp-usb43dp-phyn@ r+=+`+?+@ auxrefcom_auxusb3_pipe+ +9+F phycommon=^okay$K4ZZ5ports port@0nendpointport@1nendpoint oZ|port@2nendpointphy@890200022qcom,sc8280xp-usb-hs-phyqcom,usb-snps-hs-5nm-phyn r3 ref+- ^disabledZ}phy@89030002qcom,sc8280xp-qmp-usb43dp-phyn0@ r+B+^+D+E auxrefcom_auxusb3_pipe+ +:+B phycommon= ^disabledZ6ports port@0nendpointport@1nendpoint pZ~port@2nendpointphy@8909a002qcom,sc8280xp-dp-phy@nrqq  auxcfg_ahb< = ^disabledZphy@890ca002qcom,sc8280xp-dp-phy@nrqq  auxcfg_ahb< = ^disabledZpmu@909100002qcom,sc8280xp-llcc-bwmonqcom,sc7280-llcc-bwmonn  Q  ropp-table2operating-points-v2Zropp-0 opp-1>opp-2popp-3'opp-4,hopp-5;0Xopp-6N(opp-7Zopp-8ci8opp-9yopp-10|%@opp-11Aopp-12pmu@90b6400*2qcom,sc8280xp-cpu-bwmonqcom,sdm845-bwmonn d E >>sopp-table2operating-points-v2Zsopp-0"opp-1Eopp-2l}popp-3opp-4opp-59`opp-6ёsystem-cache-controller@92000002qcom,sc8280xp-llccn  ( 0 8 @ H P X `lllcc0_basellcc1_basellcc2_basellcc3_basellcc4_basellcc5_basellcc6_basellcc7_basellcc_broadcast_base Fusb@a4f8800 2qcom,sc8280xp-dwc3-mpqcom,dwc3n O QHr++ + +%+"++++R cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys+"+ $ qYX\[tt~ttttttttpwr_event_1pwr_event_2pwr_event_3pwr_event_4hs_phy_1hs_phy_2hs_phy_3hs_phy_4dp_hs_phy_1dm_hs_phy_1dp_hs_phy_2dm_hs_phy_2dp_hs_phy_3dm_hs_phy_3dp_hs_phy_4dm_hs_phy_4ss_phy_1ss_phy_2+ H+40 @ >?;&usb-ddrapps-usb  ^disabledusb@a400000 2snps,dwc3n @  ),uvwxyz*usb2-0usb3-0usb2-1usb3-1usb2-2usb2-3 -hostusb@a6f88002qcom,sc8280xp-dwc3qcom,dwc3n o QHr+ +&++++(++++R cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys+(+&$ Dq$%ttt<pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq+ H+50 @ >?9&usb-ddrapps-usb ^okayusb@a600000 2snps,dwc3n ` # ),  {5usb2-phyusb3-phy -peripheralports port@0nendpointport@1nendpoint |Zousb@a8f88002qcom,sc8280xp-dwc3qcom,dwc3n  QHr+!+,++1+.++++R cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys+.+,$ Dq+t t t<pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq+ H+60 @ >?:&usb-ddrapps-usb  ^disabledusb@a800000 2snps,dwc3n  * ),` }6usb2-phyusb3-phyports port@0nendpointport@1nendpoint ~Zpcci@ac4a000#2qcom,sc8280xp-cciqcom,msm8996-ccin Ġ  r"% camnoc_axislow_ahb_srccpas_ahbcci 5defaultsleep  ^disabledi2c-bus@0nJB@ i2c-bus@1nJB@ cci@ac4b000#2qcom,sc8280xp-cciqcom,msm8996-ccin İ  r"% camnoc_axislow_ahb_srccpas_ahbcci 5defaultsleep  ^disabledi2c-bus@0nJB@ i2c-bus@1nJB@ cci@ac4c000#2qcom,sc8280xp-cciqcom,msm8996-ccin   r"% camnoc_axislow_ahb_srccpas_ahbcci 5defaultsleep  ^disabledi2c-bus@0nJB@ i2c-bus@1nJB@ cci@ac4d000#2qcom,sc8280xp-cciqcom,msm8996-ccin   r"% camnoc_axislow_ahb_srccpas_ahbcci 5defaultsleep  ^disabledi2c-bus@0nJB@ i2c-bus@1nJB@ camss@ac5a0002qcom,sc8280xp-camss@n Š P p @ 0 `@ ˠ @  @@ ̀ ̰@  @ ` ͐@  @ @csiphy2csiphy3csiphy0csiphy1vfe0csid0vfe1csid1vfe2csid2vfe_lite0csid0_litevfe_lite1csid1_litevfe_lite2csid2_litevfe_lite3csid3_litevfe3csid3ghcsid1_litevfe_lite1csiphy3csid0vfe0csid1vfe1csid0_litevfe_lite0csiphy0csiphy1csiphy2csid2vfe2csid3_litecsid2_litevfe_lite3vfe_lite2csid3vfe3(ife0ife1ife2ife3top@r",$-&.(/*5689<=?@CDFGJKMNQSTVXY[]^`bc++ camnoc_axicpas_ahbcsiphy0csiphy0_timercsiphy1csiphy1_timercsiphy2csiphy2_timercsiphy3csiphy3_timervfe0_axivfe0vfe0_cphy_rxvfe0_csidvfe1_axivfe1vfe1_cphy_rxvfe1_csidvfe2_axivfe2vfe2_cphy_rxvfe2_csidvfe3_axivfe3vfe3_cphy_rxvfe3_csidvfe_lite0vfe_lite0_cphy_rxvfe_lite0_csidvfe_lite1vfe_lite1_cphy_rxvfe_lite1_csidvfe_lite2vfe_lite2_cphy_rxvfe_lite2_csidvfe_lite3vfe_lite3_cphy_rxvfe_lite3_csidgcc_axi_hfgcc_axi_sf), , , @, `, , , , ,$,$ ,$@,$`,$,$,$,$` >?   0&cam_ahbcam_hf_mnoccam_sf_mnoccam_sf_icp_mnoc ^disabledports port@0n port@1n port@2n port@3n clock-controller@ad000002qcom,sc8280xp-camccn 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cci0-sleep-stateZcci0-i2c0-sleep-pinsgpio113gpio114cci_i2ccci0-i2c1-sleep-pinsgpio115gpio116cci_i2ccci1-default-stateZcci1-i2c0-default-pinsgpio10gpio11cci_i2c cci1-i2c1-default-pinsgpio123gpio124cci_i2c cci1-sleep-stateZcci1-i2c0-sleep-pinsgpio10gpio11cci_i2ccci1-i2c1-sleep-pinsgpio123gpio124cci_i2ccci2-default-stateZcci2-i2c0-default-pinsgpio117gpio118cci_i2c cci2-i2c1-default-pinsgpio12gpio13cci_i2c cci2-sleep-stateZcci2-i2c0-sleep-pinsgpio117gpio118cci_i2ccci2-i2c1-sleep-pinsgpio12gpio13cci_i2ccci3-default-stateZcci3-i2c0-default-pinsgpio145gpio146cci_i2c cci3-i2c1-default-pinsgpio164gpio165cci_i2c cci3-sleep-stateZcci3-i2c0-sleep-pinsgpio145gpio146cci_i2ccci3-i2c1-sleep-pinsgpio164gpio165cci_i2cethernet0-default-stateZ0mdc-pinsgpio175rgmii_0 mdio-pinsgpio176rgmii_0 rgmii-tx-pins0gpio183gpio184gpio185gpio186gpio187gpio188rgmii_0 rgmii-rx-pins0gpio177gpio178gpio179gpio180gpio181gpio182rgmii_0ethernet1-default-stateZmdc-pinsgpio97rgmii_1 mdio-pinsgpio98rgmii_1 rgmii-tx-pins0gpio105gpio106gpio107gpio108gpio109gpio110rgmii_1 rgmii-rx-pins/gpio99gpio100gpio101gpio102gpio103gpio104rgmii_1i2c0-default-stategpio135gpio136qup0 ZCi2c1-default-stategpio158gpio159qup1 ZDi2c12-default-state gpio0gpio1qup12 ZEi2c15-default-stategpio36gpio37qup15 ZFi2c18-default-stategpio66gpio67qup18 ZBpcie2a-default-stateZLperst-pinsgpio143gpioclkreq-pinsgpio142pcie2a_clkreq wake-pinsgpio145gpio pcie3a-default-stateZIperst-pinsgpio151gpioclkreq-pinsgpio150pcie3a_clkreq wake-pinsgpio56gpio iommu@15000000#2qcom,sc8280xp-smmu-500arm,mmu-500n@Aghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXY~}|{zZ,interrupt-controller@17a00000 2arm,gic-v3 n     QZmsi-controller@17a400002arm,gic-v3-itsn  ZGwatchdog@17c10000%2qcom,apss-wdt-sc8280xpqcom,kpss-wdtnr4 timer@17c200002arm,armv7-timer-memn Q frame@17c21000 n frame@17c23000   n0 ^disabledframe@17c25000   nP ^disabledframe@17c27000   n` ^disabledframe@17c29000   n ^disabledframe@17c2b000   n° ^disabledframe@17c2d000  n ^disabledrsc@182000002qcom,rpmh-rsc0n !"drv-0drv-1drv-2$ *  : F apps_rsc%bcm-voter2qcom,bcm-voterZ"clock-controller2qcom,sc8280xp-rpmh-clk= xorZ3power-controller2qcom,sa8540p-rpmhpd*Z<opp-table2operating-points-v2Zopp1opp20opp3@Z#opp4Z$opp5Znopp6ZHopp7@opp8Popp9opp10Zregulators-02qcom,pm8150-rpmh-regulators Valdo3 cvreg_l3a rO n ZKldo5 cvreg_l5a r   ZZldo7 cvreg_l7a rw@ w@ Z[ldo11 cvreg_l11a r m m ZJldo13 cvreg_l13a r. . Z\regulators-12qcom,pm8150-rpmh-regulators Vcldo1 cvreg_l1c r   ldo2 cvreg_l2c r. . ldo4 cvreg_l4c rO n ldo6 cvreg_l6c rO O   ZOldo7 cvreg_l7c rw@ w@ ldo17 cvreg_l17c r&5@ &5@   ZNregulators-22qcom,pm8150-rpmh-regulators Vgldo3 cvreg_l3g rO O ZRldo7 cvreg_l7g rw@ w@ Z]ldo8 cvreg_l8g r m m ZQinterconnect@18590000#2qcom,sc8280xp-epss-l3qcom,epss-l3nYr3+  xoalternateZcpufreq@18591000-2qcom,sc8280xp-cpufreq-epssqcom,cpufreq-epss nYY freq-domain0freq-domain1 dcvsh-irq-0dcvsh-irq-1r3+  xoalternate =Zremoteproc@1b3000002qcom,sc8280xp-nsp0-pasn0@qB#wdogfatalreadyhandoverstop-ackr3 xo< nspstop  ^okay qcom/sa8540p/cdsp0.mbnglink-edgeq* *nsp0fastrpc 2qcom,fastrpcfastrpcglink-apps-dspcdsp compute-cb@12qcom,fastrpc-compute-cbn ),1 compute-cb@22qcom,fastrpc-compute-cbn ),1 compute-cb@32qcom,fastrpc-compute-cbn ),1 compute-cb@42qcom,fastrpc-compute-cbn ),1 compute-cb@52qcom,fastrpc-compute-cbn ),1 compute-cb@62qcom,fastrpc-compute-cbn ),1 compute-cb@72qcom,fastrpc-compute-cbn ),1 compute-cb@82qcom,fastrpc-compute-cbn ),1 compute-cb@92qcom,fastrpc-compute-cbn  ),1 compute-cb@102qcom,fastrpc-compute-cbn  ),1 compute-cb@112qcom,fastrpc-compute-cbn  ),1 compute-cb@122qcom,fastrpc-compute-cbn  ),1 compute-cb@132qcom,fastrpc-compute-cbn  ),1 compute-cb@142qcom,fastrpc-compute-cbn ),1 remoteproc@213000002qcom,sc8280xp-nsp1-pasn!0@qw#wdogfatalreadyhandoverstop-ackr3 xo< nspstop  ^okay qcom/sa8540p/cdsp1.mbnglink-edgeq* *nsp1 display-subsystem@220000002qcom,sc8280xp-mdssn"mdssr+-qq< ifaceahbcore0   &mdp0-memmdp1-mem a ),qq Q ^disabledZdisplay-controller@220010002qcom,sc8280xp-dpu n""  mdpvbif0r+.+/qq?q<qK! busnrt_busifacelutcorevsync<qK$ports port@0nendpoint Zport@4nendpoint Zport@5nendpoint Zport@6nendpoint Zopp-table2operating-points-v2Zopp-200000000 #opp-300000000$opp-375000000Z nopp-500000000eHopp-600000000#Fdisplayport-controller@220900002qcom,sc8280xp-dpPn" " " " " (rqqqqq; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel dp<qq ?K ^disabledports port@0nendpoint Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /nopp-8100000000GHdisplayport-controller@220980002qcom,sc8280xp-dpPn" " " " " (rqqqqq ; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel dp<qq! ?K ^disabledports port@0nendpoint Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /nopp-8100000000GHdisplayport-controller@2209a0002qcom,sc8280xp-dpPn" " " " " (rqq%q'q*q+; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixeldp<q(q, ?K ^disabledports port@0nendpoint Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /nopp-8100000000GHdisplayport-controller@220a00002qcom,sc8280xp-dpPn" " " " " (rqq/q1q4q5; core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixeldp<q2q6 ?K ^disabledports port@0nendpoint Zport@1nopp-table2operating-points-v2Zopp-160000000 h#opp-270000000߀$opp-540000000 /nopp-8100000000GHphy@220c2a002qcom,sc8280xp-dp-phy@n" *" "" &" rq%q  auxcfg_ahb< = ^disabledZphy@220c5a002qcom,sc8280xp-dp-phy@n" Z" R" V" Prq/q  auxcfg_ahb< = ^disabledZclock-controller@221000002qcom,sc8280xp-dispcc1n"dr+-3<=* ^disabledZqethernet@230000002qcom,sc8280xp-ethqos n##`stmmacethrgmii r+9+>+:+< stmmacethpclkptp_refrgmiimacirqeth_lpi ),@+ 09 BP^okayex rgmii-txiddefaultfixed-link rx-queues-configZqueue0':R`queue1':nqueue2}:queue3}:` tx-queues-configZqueue0'queue1'queue2}queue3}soundthermal-zonescpu0-thermal  -tripscpu-crit = I icriticalcpu1-thermal  -tripscpu-crit = I icriticalcpu2-thermal  -tripscpu-crit = I icriticalcpu3-thermal  -tripscpu-crit = I icriticalcpu4-thermal  -tripscpu-crit = I icriticalcpu5-thermal  -tripscpu-crit = I icriticalcpu6-thermal  -tripscpu-crit = I icriticalcpu7-thermal  -tripscpu-crit = I icriticalcluster0-thermal  - tripscpu-crit = I icriticalgpu-thermal  -cooling-mapsmap0 T Ytripstrip-point0 =L IipassiveZtrip-point1 = I icriticalmem-thermal  -tripstrip-point0 =_ Iihottimer2arm,armv8-timer0   aliases! h/soc@0/geniqup@9c0000/i2c@980000! m/soc@0/geniqup@9c0000/i2c@984000! r/soc@0/geniqup@ac0000/i2c@a90000! x/soc@0/geniqup@ac0000/i2c@a9c000! ~/soc@0/geniqup@8c0000/i2c@888000$ /soc@0/geniqup@8c0000/serial@884000chosen serial0:115200n8 interrupt-parent#address-cells#size-cellsmodelcompatible#clock-cellsclock-frequencyphandledevice_typeregclocksenable-methodcapacity-dmips-mhzdynamic-power-coefficientnext-level-cachepower-domainspower-domain-namesqcom,freq-domainoperating-points-v2interconnects#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopqcom,dload-mode#interconnect-cellsqcom,bcm-votersopp-sharedopp-hzopp-peak-kBpsrequired-oppsinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksqcom,smeminterrupts-extendedmboxesqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-rangesreg-namesclock-namesinterrupt-namesiommussnps,tsosnps,pblrx-fifo-depthtx-fifo-depthstatussnps,mtl-rx-configsnps,mtl-tx-configmax-speedphy-handlephy-modepinctrl-namespinctrl-0reset-gpiosreset-assert-usreset-deassert-usmarvell,reg-initsnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,route-upsnps,prioritysnps,route-ptpsnps,avb-algorithmsnps,route-avcpsnps,tx-queues-to-usesnps,tx-sched-spsnps,send_slopesnps,idle_slopesnps,high_creditsnps,low_credit#reset-cells#mbox-cellsbitsinterconnect-namesbus-rangedma-coherentlinux,pci-domainnum-lanesmsi-mapinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-ratesresetsreset-namesphysphy-namesclock-output-names#phy-cellsperst-gpioswake-gpiosqcom,4ln-config-selvdda-phy-supplyvdda-pll-supplylanes-per-directionfreq-table-hzvcc-supplyvccq-supply#hwlock-cellsqcom,gmuopp-level#iommu-cells#global-interruptsvdda18-supplyvdda33-supplymemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-nameslabelqcom,glink-channelsqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainqcom,din-portsqcom,dout-portsqcom,ports-sinterval-lowqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-lane-controlqcom,ports-block-group-countgpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowbias-pull-downbus-widthopp-avg-kBpsremote-endpointwakeup-sourcedr_modepinctrl-1assigned-clock-parentsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,eeqcom,channelnvmem-cellsnvmem-cell-nameswakeup-parentbias-pull-up#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-allowed-modesregulator-allow-set-load#freq-domain-cellsfirmware-namefull-duplexpolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicei2c0i2c1i2c12i2c15i2c18serial0stdout-path