8p(t8 ',Qualcomm Technologies, Inc. SM8550 HDK2qcom,sm8550-hdkqcom,sm8550 =embeddedchosenJserial0:115200n8clocksxo-board 2fixed-clockVcssleep-clk 2fixed-clockVc}s*bi-tcxo-div2-clkV2fixed-factor-clock{s)bi-tcxo-ao-div2-clkV2fixed-factor-clock{scpus cpu@0cpu2arm,cortex-a510{pscipsci d%sl2-cache2cache4@sl3-cache2cache4@scpu@100cpu2arm,cortex-a510{pscipsci d%sl2-cache2cache4@scpu@200cpu2arm,cortex-a510{psci  psci d%sl2-cache2cache4@s cpu@300cpu2arm,cortex-a715{psci  psci %sl2-cache2cache4@s cpu@400cpu2arm,cortex-a715{psci psci %sl2-cache2cache4@s cpu@500cpu2arm,cortex-a710{pscipsci %sl2-cache2cache4@scpu@600cpu2arm,cortex-a710{pscipsci %sl2-cache2cache4@scpu@700cpu2arm,cortex-x3{pscipscif L%sl2-cache2cache4@scpu-mapcluster0core0Ncore1Ncore2Ncore3Ncore4Ncore5Ncore6Ncore7Nidle-statesRpscicpu-sleep-0-02arm,idle-state_silver-rail-power-collapseo@&,s"cpu-sleep-1-02arm,idle-state_gold-rail-power-collapseo@Xs#cpu-sleep-2-02arm,idle-state_goldplus-rail-power-collapseo@F8s$domain-idle-statescluster-sleep-02domain-idle-stateoAD .#s%cluster-sleep-12domain-idle-stateoAD 0's&firmwarescm2qcom,scm-sm8550qcom,scminterconnect-02qcom,sm8550-clk-virt s2interconnect-12qcom,sm8550-mc-virt smemory@a0000000memorypmu-a5102arm,cortex-a510-pmu  pmu-a7102arm,cortex-a710-pmu  pmu-a7152arm,cortex-a715-pmu  pmu-x32arm,cortex-x3-pmu  psci 2arm,psci-1.0smcpower-domain-cpu0!*"spower-domain-cpu1!*"spower-domain-cpu2!*"s power-domain-cpu3!*#s power-domain-cpu4!*#spower-domain-cpu5!*#spower-domain-cpu6!*#spower-domain-cpu7!*$spower-domain-cluster*%&s!reserved-memory =hyp-region@80000000Dcpusys-vm-region@80a00000@Dhyp-tags-region@80e00000=Dxbl-sc-region@d8100000Dhyp-tags-reserved-region@811d0000Dxbl-dt-log-merged-region@81a00000&Daop-cmd-db-region@81c60000 2qcom,cmd-dbDaop-config-merged-region@81c80000@Dsmem@81d00000 2qcom,smem K'Dadsp-mhi-region@81f00000Dglobal-sync-region@82600000`Dtz-stat-region@82700000pDcdsp-secure-heap-region@82800000`Dmpss-region@8a800000Dsq6-mpss-dtb-region@9b000000Dsipa-fw-region@9b080000Dsipa-gsi-region@9b090000 Dgpu-micro-code-region@9b09a000 Dsspss-region@9b100000Dspu-tz-shared-region@9b280000(Dspu-modem-shared-region@9b2e0000.Dcamera-region@9b3000000Dvideo-region@9bb00000pDcvp-region@9c200000 pDcdsp-region@9c900000Dsq6-cdsp-dtb-region@9e900000Dsq6-adsp-dtb-region@9e980000Dsadspslpi-region@9ea00000Dsrmtfs-region@d4a800002qcom,rmtfs-memԨ(DSbmpss-dsm-region@d4d000000Dstz-reserved-region@d8000000Dcpucp-fw-region@d8140000Dqtee-region@d83000000PDta-region@d8800000؀Dtz-tags-region@e1200000 tDhwfence-shbuf-region@e6440000D'Dtrust-ui-vm-region@f3600000`Dtrust-ui-vm-dump-region@f80ee000Dtrust-ui-vm-qrt-region@f80ef000Dtrust-ui-vm-vblk0-ring-region@f80f8000@Dtrust-ui-vm-vblk1-ring-region@f80fc000@Dtrust-ui-vm-swiotlb-region@f8100000Doem-vm-region@f8400000@Doem-vm-vblk0-ring-region@fcc00000@Doem-vm-swiotlb-region@fcc04000@Dhyp-ext-tags-region@fce00000Dhyp-ext-reserved-region@ff700000pDsmp2p-adsp 2qcom,smp2plv( (master-kernelmaster-kernelsslave-kernel slave-kernelssmp2p-cdsp 2qcom,smp2pl^v( (master-kernelmaster-kernelsslave-kernel slave-kernelssmp2p-modem 2qcom,smp2plv( (master-kernelmaster-kernelsslave-kernel slave-kernelsipa-ap-to-modemipasipa-modem-to-apipassoc@0 2simple-bus= clock-controller@1000002qcom,sm8550-gccBV<{)*+,,---.s0mailbox@4080002qcom,sm8550-ipccqcom,ipcc@  s(dma-controller@800000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma! LMNOPQRSTUVW, 9> J/6Q ^disableds5geniqup@8c00002qcom,geni-se-qup = em-ahbs-ahb{00 J/#Q ^okayi2c@8800002qcom,geni-i2c@ese{0oqdefault1  u H2234qup-corequp-configqup-memory 55txrx ^disabledspi@8800002qcom,geni-spi@ese{0o  uqdefault67H2234qup-corequp-configqup-memory 55txrx  ^disabledi2c@8840002qcom,geni-i2c@@ese{0qqdefault8  G H2234qup-corequp-configqup-memory 55txrx ^disabledspi@8840002qcom,geni-spi@@ese{0q  Gqdefault9:H2234qup-corequp-configqup-memory 55txrx  ^disabledi2c@8880002qcom,geni-i2c@ese{0sqdefault;  H H2234qup-corequp-configqup-memory 55txrx ^disabledspi@8880002qcom,geni-spi@ese{0s  Hqdefault<=H2234qup-corequp-configqup-memory 55txrx  ^disabledi2c@88c0002qcom,geni-i2c@ese{0uqdefault>  I H2234qup-corequp-configqup-memory 55txrx ^disabledspi@88c0002qcom,geni-spi@ese{0u  Iqdefault?@H2234qup-corequp-configqup-memory 55txrx  ^disabledi2c@8900002qcom,geni-i2c@ese{0wqdefaultA  J H2234qup-corequp-configqup-memory 55txrx ^disabledspi@8900002qcom,geni-spi@ese{0w  JqdefaultBCH2234qup-corequp-configqup-memory 55txrx  ^disabledi2c@8940002qcom,geni-i2c@@ese{0yqdefaultD  K H2234qup-corequp-configqup-memory 55txrx ^disabledspi@8940002qcom,geni-spi@@ese{0y  KqdefaultEFH2234qup-corequp-configqup-memory 55txrx  ^disabledserial@8980002qcom,geni-uart@ese{0{qdefaultGH  02234qup-corequp-config^okaybluetooth2qcom,wcn7850-btIJJJKL0 MQ MRNqdefaulti2c@89c0002qcom,geni-i2c@ese{0}qdefaultO   H2234qup-corequp-configqup-memory 55txrx ^disabledspi@89c0002qcom,geni-spi@ese{0}  qdefaultPQH2234qup-corequp-configqup-memory 55txrx  ^disabledgeniqup@9c00002qcom,geni-se-i2c-master-hub es-ahb{0Z =^okayi2c@9800002qcom,geni-i2c-master-hub@esecore{0F0EqdefaultR   02234qup-corequp-config ^disabledi2c@9840002qcom,geni-i2c-master-hub@@esecore{0H0EqdefaultS   02234qup-corequp-config ^disabledi2c@9880002qcom,geni-i2c-master-hub@esecore{0J0EqdefaultT   02234qup-corequp-config^okaytypec-mux@42 2fcs,fsa4480B+U6BportendpointUVsi2c@98c0002qcom,geni-i2c-master-hub@esecore{0L0EqdefaultW   02234qup-corequp-config ^disabledi2c@9900002qcom,geni-i2c-master-hub@esecore{0N0EqdefaultX   02234qup-corequp-config ^disabledi2c@9940002qcom,geni-i2c-master-hub@@esecore{0P0EqdefaultY   02234qup-corequp-config ^disabledi2c@9980002qcom,geni-i2c-master-hub@esecore{0R0EqdefaultZ   02234qup-corequp-config ^disabledi2c@99c0002qcom,geni-i2c-master-hub@esecore{0T0Eqdefault[   02234qup-corequp-config ^disabledi2c@9a00002qcom,geni-i2c-master-hub@esecore{0V0Eqdefault\   02234qup-corequp-config ^disabledi2c@9a40002qcom,geni-i2c-master-hub@@esecore{0X0Eqdefault]   02234qup-corequp-config ^disableddma-controller@a00000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma! %&'()*, 9 J/Q^okays`geniqup@ac00002qcom,geni-se-qup = em-ahbs-ahb{00 J/22 qup-coreQ ^okayi2c@a800002qcom,geni-i2c@ese{0]qdefault^  a H2234_qup-corequp-configqup-memory ``txrx^okaychdmi-bridge@2b2lontium,lt9611uxc+ vM eMqa+bcdqdefaultports port@0endpointUesport@2endpointUfsspi@a800002qcom,geni-spi@ese{0]  aqdefaultghH2234_qup-corequp-configqup-memory ``txrx  ^disabledi2c@a840002qcom,geni-i2c@@ese{0_qdefaulti  b H2234_qup-corequp-configqup-memory ``txrx ^disabledspi@a840002qcom,geni-spi@@ese{0_  bqdefaultjkH2234_qup-corequp-configqup-memory ``txrx  ^disabledi2c@a880002qcom,geni-i2c@ese{0aqdefaultl  c H2234_qup-corequp-configqup-memory ``txrx ^disabledspi@a880002qcom,geni-spi@ese{0a  cqdefaultmnH2234_qup-corequp-configqup-memory ``txrx  ^disabledi2c@a8c0002qcom,geni-i2c@ese{0cqdefaulto  d H2234_qup-corequp-configqup-memory ``txrx ^disabledspi@a8c0002qcom,geni-spi@ese{0c  dqdefaultpqH2234_qup-corequp-configqup-memory ``txrx  ^disabledi2c@a900002qcom,geni-i2c@ese{0eqdefaultr  e H2234_qup-corequp-configqup-memory ``txrx ^disabledspi@a900002qcom,geni-spi@ese{0e  eqdefaultstH2234_qup-corequp-configqup-memory ``txrx  ^disabledi2c@a940002qcom,geni-i2c@@ese{0gqdefaultu  fH2234_qup-corequp-configqup-memory ``txrx  ^disabledspi@a940002qcom,geni-spi@@ese{0g  fqdefaultvwH2234_qup-corequp-configqup-memory ``txrx  ^disabledi2c@a980002qcom,geni-i2c@ese{0iqdefaultx  kH2234_qup-corequp-configqup-memory ``txrx  ^disabledspi@a980002qcom,geni-spi@ese{0i  kqdefaultyzH2234_qup-corequp-configqup-memory ``txrx  ^disabledserial@a9c0002qcom,geni-debug-uart@ese{0kqdefault{  Cqup-corequp-config02234^okayinterconnect@15000002qcom,sm8550-cnoc-mainP0 s}interconnect@16000002qcom,sm8550-config-noc`b s4interconnect@16800002qcom,sm8550-system-nochЀ interconnect@16c00002qcom,sm8550-pcie-anocl"{00  s|interconnect@16e00002qcom,sm8550-aggre1-nocnD{00 s_interconnect@17000002qcom,sm8550-aggre2-nocp{  sinterconnect@17800002qcom,sm8550-mmss-nocx srng@10c30002qcom,sm8550-trngqcom,trng 0pcie@1c00000pci2qcom,pcie-sm8550P0`` ``|parfdbielbiatuconfig 8=` `0`0Q` (msi0msi1msi2msi3msi4msi5msi6msi78{0"0$0%0*0+00=eauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr0|3}pcie-memcpu-pcie ~~ //0pci0+pciephy^okay M` M^qdefaultpcie@0pci =phy@1c06000 2qcom,sm8550-qmp-gen3x2-pcie-phy` ({0"0$0&0(eauxcfg_ahbrefrchngpipe0phy'0&70VLpcie0_pipe_clk_^okayjzs+pcie@1c08000pci2qcom,pcie-sm8550P0@@ @@|parfdbielbiatuconfig 8=@ @0@0Q` 34589:vw(msi0msi1msi2msi3msi4msi5msi6msi7@{0,0.0/0607000 Ieauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axi'0,7$0|3} pcie-memcpu-pcie ~~ //00 pcilink_down0,pciephy^okay Mc Maqdefaultpcie@0pci =phy@1c0e000 2qcom,sm8550-qmp-gen4x2-pcie-phy ({000.0204eauxcfg_ahbrefrchngpipe0 0 phyphy_nocsr'0270VLpcie1_pipe_clk_^okayjzs,dma-controller@1dc4000 2qcom,bam-v1.7.4qcom,bam-v1.7.0@  !J//scrypto@1dfa000)2qcom,sm8550-qceqcom,sm8150-qceqcom,qceߠ`rxtxJ//memoryphy@1d800002qcom,sm8550-qmp-ufs-phy {0erefref_auxqref0ufsphyV_^okayjzs-ufs@1d84000+2qcom,sm8550-ufshcqcom,ufshcjedec,ufs-2.0@0   -ufsphy0rst0 J/`Q0_34#ufs-ddrcpu-ufsnecore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@{0000000^okay eM+  O*sopp-table2operating-points-v2sopp-75000000@9xhxhopp-150000000@9ррopp-300000000@9crypto@1d88000;2qcom,sm8550-inline-crypto-engineqcom,inline-crypto-engine؀{0shwlock@1f400002qcom,tcsr-mutex@s'clock-controller@1fc00002qcom,sm8550-tcsrsyscon{Vsgpu@3d00000!2qcom,adreno-43050a01qcom,adreno0#|kgsl_3d0_reg_memorycx_memcx_dbgc  ,JN%^okayszap-shaderWeqcom/sm8550/a740_zap.mbnopp-table2operating-points-v2sopp-6800000009(sopp-6150000009$'sopp-5500000009 Usopp-4750000009OsPopp-4010000009@s@opp-3480000009s<opp-2950000009Ws8opp-2200000009 s4gmu@3d6a000&2qcom,adreno-gmu-740.1qcom,adreno-gmu0֠P (|gmursccgmu_pdc 01hfigmu8{0 0 !eahbgmucxoaximemnochubdemetcxgx J}sopp-table2operating-points-v2sopp-5000000009esopp-2000000009 s@clock-controller@3d900002qcom,sm8550-gpucc{)00Vsiommu@3da0000@2qcom,sm8550-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-5008 >?@A { 0 0!ehlosbusifaceahbQsipa@3f400002qcom,sm8550-ipaJ//0P@|ipa-regipa-sharedgsi8v(ipagsiipa-clock-queryipa-setup-ready{ ecore034memoryconfig}*ipa-clock-enabled-validipa-clock-enabled^okayselfWeqcom/sm8550/ipa_fws.mbnremoteproc@40800002qcom,sm8550-mpss-pas@@Lv0wdogfatalreadyhandoverstop-ackshutdown-ack{exo cxmss W}stop^okay0eqcom/sm8550/modem.mbnqcom/sm8550/modem_dtb.mbnglink-edgev( (mpsscodec@6aa00002qcom,sm8550-lpass-wsa-macro({DfgemclkmacrodcodecfsgenV Lwsa2-mclkssoundwire@6ab00002qcom,soundwire-v2.0.0  {eifaceWSA2qdefault ?? (  ; N ` q     ^disabledcodec@6ac00002qcom,sm8550-lpass-rx-macro({@fgemclkmacrodcodecfsgenVLmclkssoundwire@6ad00002qcom,soundwire-v2.0.0  {eifaceRXqdefault ? (  ;  N ` q    ^okays codec@0,42sdw20217010d00scodec@6ae00002qcom,sm8550-lpass-tx-macro({9fgemclkmacrodcodecfsgenVLmclkscodec@6b000002qcom,sm8550-lpass-wsa-macro({BfgemclkmacrodcodecfsgenVLmclkssoundwire@6b100002qcom,soundwire-v2.0.0  {eifaceWSAqdefault ?? (  ; N ` q    ^okaysspeaker@0,02sdw20217020400qdefault I I SpkrLeft, sspeaker@0,12sdw20217020400qdefault I I SpkrRight, ssoundwire@6d300002qcom,soundwire-v2.0.0  corewakeup{eifaceTXqdefault>(;N`q ^okays codec@0,32sdw20217010d00Wscodec@6d440002qcom,sm8550-lpass-va-macro@${9fgemclkmacrodcodecVLfsgenspinctrl@6e800002qcom,sm8550-lpass-lpi-pinctrl %l|{fg ecoreaudiostx-swr-active-statesclk-pinsgpio0 swr_tx_clkdata-pinsgpio1gpio2gpio14 swr_tx_datarx-swr-active-statesclk-pinsgpio3 swr_rx_clkdata-pins gpio4gpio5 swr_rx_datadmic01-default-stateclk-pinsgpio6 dmic1_clkdata-pinsgpio7 dmic1_datadmic23-default-stateclk-pinsgpio8 dmic2_clkdata-pinsgpio9 dmic2_datawsa-swr-active-statesclk-pinsgpio10 wsa_swr_clkdata-pinsgpio11 wsa_swr_datawsa2-swr-active-statesclk-pinsgpio15 wsa2_swr_clkdata-pinsgpio16wsa2_swr_dataspkr-1-sd-n-active-stategpio17gpiosspkr-2-sd-n-active-stategpio18gpiosinterconnect@74000002qcom,sm8550-lpass-lpiaon-noc@ interconnect@74300002qcom,sm8550-lpass-lpicx-nocC sinterconnect@7e400002qcom,sm8550-lpass-ag-noc mmc@8804000$2qcom,sm8550-sdhciqcom,sdhci-msm-v5@ hc_irqpwr_irq{00eifacecorexo J/@d, h034sdhc-ddrcpu-sdhc Q $^okay 4  =qdefaultsleep G S ` hopp-table2operating-points-v2sopp-192000009$opp-500000009opp-1000000009opp-2020000009 Fclock-controller@aaf00002qcom,sm8550-videocc  {)0Vclock-controller@ade00002qcom,sm8550-camcc {0)*Vdisplay-subsystem@ae000002qcom,sm8550-mdss |mdss  S {00=03 mdp0-memmdp1-mem J/ =^okaysdisplay-controller@ae010002qcom,sm8550-dpu   |mdpvbif 0{00@=I!ebusnrt_busifacelutcorevsync'I7$ports port@0endpointUsport@1endpointUsport@2endpointUsopp-table2operating-points-v2sopp-2000000009 opp-3250000009_@opp-3750000009Z opp-5140000009displayport-controller@ae900002qcom,sm8550-dpqcom,sm8350-dpP      ({ ;ecore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel' o...dp^okayports port@0endpointUsport@1endpointU sopp-table2operating-points-v2sopp-1620000009 opp-2700000009߀opp-5400000009 /opp-81000000090Gdsi@ae94000(2qcom,sm8550-dsi-ctrlqcom,mdss-dsi-ctrl @ |dsi_ctrl 0{B80$ebytebyte_intfpixelcoreifacebus'C odsi ^okay ports port@0endpointUsport@1endpointU seopp-table2operating-points-v2sopp-1875000009 -opp-3000000009opp-3580000009Vphy@ae950002qcom,sm8550-dsi-phy-4nm0 P R U|dsi_phydsi_phy_lanedsi_pll{ eifacerefV_^okay sdsi@ae96000(2qcom,sm8550-dsi-ctrlqcom,mdss-dsi-ctrl ` |dsi_ctrl 0{ D:0$ebytebyte_intfpixelcoreifacebus' E odsi  ^disabledports port@0endpointUsport@1endpointphy@ae970002qcom,sm8550-dsi-phy-4nm0 p r u|dsi_phydsi_phy_lanedsi_pll{ eifacerefV_ ^disabledsclock-controller@af000002qcom,sm8550-dispcc \{)0*..Vsphy@88e30002qcom,sm8550-snps-eusb2-phy0T_{eref0^okayq sphy@88e80002qcom,sm8550-qmp-usb3-dp-phy0 {000eauxrefcom_auxusb3_pipe000 phycommonV_B^okayjzs.ports port@0endpointUsport@1endpointUsport@2endpointUsusb@a6f88002qcom,sm8550-dwc3qcom,dwc3 o =0{0 0000&ecfg_noccoreifacesleepmock_utmixo'007$ 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* sled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led ^disabledpwm!2qcom,pm8550-pwmqcom,pm8350c-pwm 7^okay led@1status B Hoffled@2status B Hoffled@3status B Hoffpmic@72qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    sgpio@8800!2qcom,pm8550b-gpioqcom,spmi-gpiol |sphy@fd002qcom,pm8550b-eusb2-repeater_ VI cspmic@52qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    sgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpiol|spmic@22qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    sgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpiol|spmic@32qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    sgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpiol|spmic@42qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    sgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpiol|spmic@62qcom,pm8550qcom,spmi-pmic temp-alarm@a002qcom,spmi-temp-alarm    sgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpiol|spmic@02qcom,pm8550qcom,spmi-pmic pon@13002qcom,pmk8350-pon |hlospbspwrkey2qcom,pmk8350-pwrkey  ot^okayresin2qcom,pmk8350-resin ^okay orrtc@61002qcom,pmk8350-rtcab |rtcalarm bnvram@71002qcom,spmi-sdamq  =qreboot-reason@48H zsgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpiol|spmic@a2qcom,pmr735dqcom,spmi-pmic  temp-alarm@a002qcom,spmi-temp-alarm   sgpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpiol|spinctrl@f1000002qcom,sm8550-tlmm0  l|M  sMhub-i2c0-data-clk-stategpio16gpio17 i2chub0_se0 sRhub-i2c1-data-clk-stategpio18gpio19 i2chub0_se1 sShub-i2c2-data-clk-stategpio20gpio21 i2chub0_se2 sThub-i2c3-data-clk-stategpio22gpio23 i2chub0_se3 sWhub-i2c4-data-clk-state gpio4gpio5 i2chub0_se4 sXhub-i2c5-data-clk-state gpio6gpio7 i2chub0_se5 sYhub-i2c6-data-clk-state gpio8gpio9 i2chub0_se6 sZhub-i2c7-data-clk-stategpio10gpio11 i2chub0_se7 s[hub-i2c8-data-clk-stategpio206gpio207 i2chub0_se8 s\hub-i2c9-data-clk-stategpio84gpio85 i2chub0_se9 s]pcie0-default-statesperst-pinsgpio94gpio clkreq-pinsgpio95pcie0_clk_req_n wake-pinsgpio96gpio pcie1-default-statesperst-pinsgpio97gpio clkreq-pinsgpio98pcie1_clk_req_n wake-pinsgpio99gpio qup-i2c0-data-clk-stategpio28gpio29 qup1_se0 s^qup-i2c1-data-clk-stategpio32gpio33 qup1_se1 siqup-i2c2-data-clk-stategpio36gpio37 qup1_se2 slqup-i2c3-data-clk-stategpio40gpio41 qup1_se3 soqup-i2c4-data-clk-stategpio44gpio45 qup1_se4 srqup-i2c5-data-clk-stategpio52gpio53 qup1_se5 suqup-i2c6-data-clk-stategpio48gpio49 qup1_se6 sxqup-i2c8-data-clk-states1scl-pinsgpio57qup2_se0_l1_mira sda-pinsgpio56qup2_se0_l0_mira qup-i2c9-data-clk-stategpio60gpio61 qup2_se1 s8qup-i2c10-data-clk-stategpio64gpio65 qup2_se2 s;qup-i2c11-data-clk-stategpio68gpio69 qup2_se3 s>qup-i2c12-data-clk-state gpio2gpio3 qup2_se4 sAqup-i2c13-data-clk-stategpio80gpio81 qup2_se5 sDqup-i2c15-data-clk-stategpio72gpio106 qup2_se7 sOqup-spi0-cs-stategpio31 qup1_se0shqup-spi0-data-clk-stategpio28gpio29gpio30 qup1_se0sgqup-spi1-cs-stategpio35 qup1_se1skqup-spi1-data-clk-stategpio32gpio33gpio34 qup1_se1sjqup-spi2-cs-stategpio39 qup1_se2snqup-spi2-data-clk-stategpio36gpio37gpio38 qup1_se2smqup-spi3-cs-stategpio43 qup1_se3sqqup-spi3-data-clk-stategpio40gpio41gpio42 qup1_se3spqup-spi4-cs-stategpio47 qup1_se4stqup-spi4-data-clk-stategpio44gpio45gpio46 qup1_se4ssqup-spi5-cs-stategpio55 qup1_se5swqup-spi5-data-clk-stategpio52gpio53gpio54 qup1_se5svqup-spi6-cs-stategpio51 qup1_se6szqup-spi6-data-clk-stategpio48gpio49gpio50 qup1_se6syqup-spi8-cs-stategpio59qup2_se0_l3_miras7qup-spi8-data-clk-stategpio56gpio57gpio58qup2_se0_l2_miras6qup-spi9-cs-stategpio63 qup2_se1s:qup-spi9-data-clk-stategpio60gpio61gpio62 qup2_se1s9qup-spi10-cs-stategpio67 qup2_se2s=qup-spi10-data-clk-stategpio64gpio65gpio66 qup2_se2s<qup-spi11-cs-stategpio71 qup2_se3s@qup-spi11-data-clk-stategpio68gpio69gpio70 qup2_se3s?qup-spi12-cs-stategpio119 qup2_se4sCqup-spi12-data-clk-stategpio2gpio3gpio118 qup2_se4sBqup-spi13-cs-stategpio83 qup2_se5sFqup-spi13-data-clk-stategpio80gpio81gpio82 qup2_se5sEqup-spi15-cs-stategpio75 qup2_se7sQqup-spi15-data-clk-stategpio72gpio106gpio74 qup2_se7sPqup-uart7-default-stategpio26gpio27 qup1_se7s{qup-uart14-default-stategpio78gpio79 qup2_se6 sGqup-uart14-cts-rts-stategpio76gpio77 qup2_se6 sHsdc2-sleep-statesclk-pins sdc2_clkcmd-pins sdc2_cmd data-pins sdc2_data sdc2-default-statesclk-pins sdc2_clkcmd-pins sdc2_cmd  data-pins sdc2_data  bt-default-statesNbt-en-pinsgpio81gpiosw-ctrl-pinsgpio82gpio lt9611-irq-stategpio8gpiosclt9611-rst-stategpio7gpiosdwcd-reset-n-active-stategpio108gpiosiommu@15000000/2qcom,sm8550-smmu-500qcom,smmu-500arm,mmu-500 Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYQs/interrupt-controller@17100000 2arm,gic-v3  =      smsi-controller@171400002arm,gic-v3-its  s~timer@174200002arm,armv7-timer-memB=  frame@17421000BB   frame@17423000B0    ^disabledframe@17425000BP    ^disabledframe@17427000Bp    ^disabledframe@17429000B    ^disabledframe@1742b000B    ^disabledframe@1742d000B    ^disabledrsc@17a00000 apps_rsc2qcom,rpmh-rsc@|drv-0drv-1drv-2drv-3$     !bcm-voter2qcom,bcm-voters clock-controller2qcom,sm8550-rpmh-clkVexo{spower-controller2qcom,sm8550-rpmhpdsopp-table2operating-points-v2sopp-16sopp-48s0sopp-52s4opp-56s8sopp-60s<opp-64s@sopp-80sPopp-128ssopp-144sopp-192ssopp-256ssopp-320s@opp-336sPopp-384sopp-416sregulators-02qcom,pm8550-rpmh-regulators 0 @ PL eU {K U U U K L L  bbob1 vreg_bob1 2K -