+8(' ',Qualcomm Technologies, Inc. SM8650 HDK2qcom,sm8650-hdkqcom,sm8650 =embeddedchosenJserial0:115200n8clocksxo-board 2fixed-clockVcssleep-clk 2fixed-clockVc}s)bi-tcxo-div2-clk2fixed-factor-clockV{s'bi-tcxo-ao-div2-clk2fixed-factor-clockV{s(cpus cpu@0cpu2arm,cortex-a520{pscipscid%sl2-cache2cache4@sl3-cache2cache4@scpu@100cpu2arm,cortex-a520{pscipscid%scpu@200cpu2arm,cortex-a720{pscipsci %sl2-cache2cache4@s cpu@300cpu2arm,cortex-a720{ pscipsci %scpu@400cpu2arm,cortex-a720{ pscipsci %sl2-cache2cache4@s cpu@500cpu2arm,cortex-a720{ pscipsci%sl2-cache2cache4@scpu@600cpu2arm,cortex-a720{pscipsci%sl2-cache2cache4@scpu@700cpu2arm,cortex-x4{pscipscifL%sl2-cache2cache4@scpu-mapcluster0core0Ncore1Ncore2Ncore3Ncore4Ncore5Ncore6Ncore7Nidle-statesRpscicpu-sleep-0-02arm,idle-state_silver-rail-power-collapseo@&,s cpu-sleep-1-02arm,idle-state_gold-rail-power-collapseo@Xs!cpu-sleep-2-02arm,idle-state_gold-plus-rail-power-collapseo@F8s"domain-idle-statescluster-sleep-02domain-idle-stateoAD .#s#cluster-sleep-12domain-idle-stateoAD 0's$firmwarescm2qcom,scm-sm8650qcom,scmsinterconnect-02qcom,sm8650-clk-virts0interconnect-12qcom,sm8650-mc-virtsmemory@a0000000memorypmu-a5202arm,cortex-a520-pmu  pmu-a7202arm,cortex-a720-pmu  pmu-x42arm,cortex-x4-pmu  psci 2arm,psci-1.0smcpower-domain-cpu0* spower-domain-cpu1* spower-domain-cpu2* spower-domain-cpu3*!s power-domain-cpu4*!s power-domain-cpu5*!s power-domain-cpu6*!spower-domain-cpu7*"spower-domain-cluster*#$sreserved-memory =shyp@80000000Dscpusys-vm@80e00000@Dsxbl-dt-log-merged@81a00000&Dsaop-cmd-db@81c60000 2qcom,cmd-dbDs aop-tme-uefi-merged@81c80000PDs!smem@81d00000 2qcom,smem K%Ds"adsp-mhi@81f00000Ds#pvmfw@824a0000JDs$global-sync@82600000`Dstz-stat@82700000pDs%qdss@82800000Ds&qlink-logging@84800000 Dsmpss-dsm@86b00000Dsmpss-dsm-2@8b400000@Dsmpss@8bc00000@Dsq6-mpss-dtb@9b000000Dsipa-fw@9b080000Dsipa-gsi@9b090000 Ds'gpu-micro-code@9b09a000 Dsspss@9b0a0000 Ds(spu-tz-shared@9b280000(Ds)spu-modem-shared@9b2e0000.Ds*camera@9b3000000Ds+video@9bb00000Ds,cvp@9c3000000pDs-cdsp@9ca00000@Dsq6-cdsp-dtb@9de00000Dsq6-adsp-dtb@9de80000Dsadspslpi@9df00000Dsrmtfs@d7c000002qcom,rmtfs-mem@DSbs.tz-merged@d8000000Ds/hwfence-shbuf@e6440000D-Ds0trust-ui-vm@f3800000@Ds1oem-vm@f7c00000Ds2llcc-lpi@ff800000`Ds3smp2p-adsp 2qcom,smp2pl& &master-kernelmaster-kernelsslave-kernel slave-kernelssmp2p-cdsp 2qcom,smp2pl& &^master-kernelmaster-kernelsslave-kernel slave-kernelssmp2p-modem 2qcom,smp2pl& &master-kernelmaster-kernelsslave-kernel slave-kernelsipa-ap-to-modemipasipa-modem-to-apipassoc@0 2simple-bus =s4clock-controller@1000002qcom,sm8650-gccB@{'()*++,,,-Vs/mailbox@4060002qcom,sm8650-ipccqcom,ipcc@`  s&dma-controller@800000(2qcom,sm8650-gpi-dmaqcom,sm6350-gpi-dma LMNOPQRSTUVW! .?? J.6Q ^disableds3geniqup@8c00002qcom,geni-se-qup {// em-ahbs-ahb J.#Q =^okays5i2c@8800002qcom,geni-i2c@  u{/veseH0012qqup-corequp-configqup-memory 33txrx4default  ^disableds6spi@8800002qcom,geni-spi@  u{/veseH0012qqup-corequp-configqup-memory 33txrx56default  ^disableds7i2c@8840002qcom,geni-i2c@@  G{/xeseH0012qqup-corequp-configqup-memory 33txrx7default  ^disableds8spi@8840002qcom,geni-spi@@  G{/xeseH0012qqup-corequp-configqup-memory 33txrx89default  ^disableds9i2c@8880002qcom,geni-i2c@  H{/zeseH0012qqup-corequp-configqup-memory 33txrx:default  ^disableds:spi@8880002qcom,geni-spi@  H{/zeseH0012qqup-corequp-configqup-memory 33txrx;<default  ^disableds;i2c@88c0002qcom,geni-i2c@  I{/|eseH0012qqup-corequp-configqup-memory 33txrx=default  ^disableds<spi@88c0002qcom,geni-spi@  I{/|eseH0012qqup-corequp-configqup-memory 33txrx>?default  ^disableds=i2c@8900002qcom,geni-i2c@  J{/~eseH0012qqup-corequp-configqup-memory 33txrx@default  ^disableds>spi@8900002qcom,geni-spi@  J{/~eseH0012qqup-corequp-configqup-memory 33txrxABdefault  ^disableds?i2c@8940002qcom,geni-i2c@@  K{/eseH0012qqup-corequp-configqup-memory 33txrxCdefault  ^disableds@spi@8940002qcom,geni-spi@@  K{/eseH0012qqup-corequp-configqup-memory 33txrxDEdefault  ^disabledsAserial@8980002qcom,geni-uart@  {/ese00012qqup-corequp-configFGdefault^okaysBbluetooth2qcom,wcn7850-btHIJJKL0 M MNdefaultserial@89c0002qcom,geni-debug-uart@  {/ese00012qqup-corequp-configOdefault^okaysCgeniqup@9c00002qcom,geni-se-i2c-master-hub {/\es-ahb = ^disabledsDi2c@9800002qcom,geni-i2c-master-hub@  {/H/Gesecore00012qqup-corequp-configPdefault  ^disabledsEi2c@9840002qcom,geni-i2c-master-hub@@  {/J/Gesecore00012qqup-corequp-configQdefault  ^disabledsFi2c@9880002qcom,geni-i2c-master-hub@  {/L/Gesecore00012qqup-corequp-configRdefault  ^disabledsGi2c@98c0002qcom,geni-i2c-master-hub@  {/N/Gesecore00012qqup-corequp-configSdefault  ^disabledsHi2c@9900002qcom,geni-i2c-master-hub@  {/P/Gesecore00012qqup-corequp-configTdefault  ^disabledsIi2c@9940002qcom,geni-i2c-master-hub@@  {/R/Gesecore00012qqup-corequp-configUdefault  ^disabledsJi2c@9980002qcom,geni-i2c-master-hub@  {/T/Gesecore00012qqup-corequp-configVdefault  ^disabledsKi2c@99c0002qcom,geni-i2c-master-hub@  {/V/Gesecore00012qqup-corequp-configWdefault  ^disabledsLi2c@9a00002qcom,geni-i2c-master-hub@  {/X/Gesecore00012qqup-corequp-configXdefault  ^disabledsMi2c@9a40002qcom,geni-i2c-master-hub@@  {/Z/Gesecore00012qqup-corequp-configYdefault  ^disabledsNdma-controller@a00000(2qcom,sm8650-gpi-dmaqcom,sm6350-gpi-dma %&'()*! . ? J.Q^okays[geniqup@ac00002qcom,geni-se-qup {// em-ahbs-ahb00 qqup-core J.Q =^okaysOi2c@a800002qcom,geni-i2c@  a{/aeseH0012Zqqup-corequp-configqup-memory [[txrx\default  ^disabledsPspi@a800002qcom,geni-spi@  a{/aeseH0012Zqqup-corequp-configqup-memory [[txrx]^default  ^disabledsQi2c@a840002qcom,geni-i2c@@  b{/ceseH0012Zqqup-corequp-configqup-memory [[txrx_default  ^disabledsRspi@a840002qcom,geni-spi@@  b{/ceseH0012Zqqup-corequp-configqup-memory [[txrx`adefault  ^disabledsSi2c@a880002qcom,geni-i2c@  c{/eeseH0012Zqqup-corequp-configqup-memory [[txrxbdefault  ^disabledsTspi@a880002qcom,geni-spi@  c{/eeseH0012Zqqup-corequp-configqup-memory [[txrxcddefault  ^disabledsUi2c@a8c0002qcom,geni-i2c@  d{/geseH0012Zqqup-corequp-configqup-memory [[txrxedefault ^okaysVtypec-mux@e&2qcom,wcd9395-usbssqcom,wcd9390-usbss+I 6MBNsWports port@0endpointafs spi@a8c0002qcom,geni-spi@  d{/geseH0012Zqqup-corequp-configqup-memory [[txrxghdefault  ^disabledsXi2c@a900002qcom,geni-i2c@  e{/ieseH0012Zqqup-corequp-configqup-memory [[txrxidefault  ^disabledsYspi@a900002qcom,geni-spi@  e{/ieseH0012Zqqup-corequp-configqup-memory [[txrxjkdefault ^okayledsZtouchscreen@0default' `'8'vB@'j 6M M2goodix,gt9916i2c@a940002qcom,geni-i2c@@  f{/keseH0012Zqqup-corequp-configqup-memory [[txrxldefault  ^disableds[spi@a940002qcom,geni-spi@@  f{/keseH0012Zqqup-corequp-configqup-memory [[txrxmndefault  ^disableds\i2c@a980002qcom,geni-i2c@  k{/meseH0012Zqqup-corequp-configqup-memory [[txrxodefault  ^disabledcs]hdmi-bridge@2b ^disabledt962lontium,lt9611uxc+ lMU 6M+pqqrsdefaults^ports port@0endpointatsport@2endpointausspi@a980002qcom,geni-spi@  k{/meseH0012Zqqup-corequp-configqup-memory [[txrxvwdefault  ^disableds_i2c@a9c0002qcom,geni-i2c@  C{/oeseH0012Zqqup-corequp-configqup-memory [[txrxxdefault  ^disableds`spi@a9c0002qcom,geni-spi@  C{/oeseH0012Zqqup-corequp-configqup-memory [[txrxyzdefault  ^disabledsainterconnect@15000002qcom,sm8650-cnoc-mainP@s|interconnect@16000002qcom,sm8650-config-noc`bs2interconnect@16800002qcom,sm8650-system-nochЀsbinterconnect@16c00002qcom,sm8650-pcie-anocl"{// s{interconnect@16e00002qcom,sm8650-aggre1-nocnd{//sZinterconnect@17000002qcom,sm8650-aggre2-nocp{ sinterconnect@17800002qcom,sm8650-mmss-nocxsrng@10c30002qcom,sm8650-trngqcom,trng 0scpcie@1c00000pci"2qcom,pcie-sm8650qcom,pcie-sm8550P0`` ``|parfdbielbiatuconfig` (msi0msi1msi2msi3msi4msi5msi6msi7@{/$/&/'/,/-/ // Ieauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axi/pci0{1| qpcie-memcpu-pcie/ .. }}*pciephy 8=` `0`0Q^okay M` (M^~defaultsdpcie@0pci =sewifi@0 2pci17cb,11074ETctphy@1c06000 2qcom,sm8650-qmp-gen3x2-pcie-phy` ({/$/&/(/*eauxcfg_ahbrefrchngpipe/(/phy/Vpcie0_pipe_clk^okays*pcie@1c08000pci"2qcom,pcie-sm8650qcom,pcie-sm8550P0@@ @@|parfdbielbiatuconfig` 34589:vw(msi0msi1msi2msi3msi4msi5msi6msi7@{/./0/1/8/9/ // Ieauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axi/.$// pcilink_down0{1| qpcie-memcpu-pcie/ .. }}+pciephyQ 8=@ @0@0^okay Mc (Madefaultsfpcie@0pci =phy@1c0e000 2qcom,sm8650-qmp-gen4x2-pcie-phy ({/2/0/4/6eauxcfg_ahbrefrchngpipe/4/ / phyphy_nocsr/Vpcie1_pipe_clk^okays+dma-controller@1dc40002qcom,bam-v1.7.0@  ?J.. scrypto@1dfa000)2qcom,sm8650-qceqcom,sm8150-qceqcom,qceߠ`qmemoryrxtxJ..sgphy@1d800002qcom,sm8650-qmp-ufs-phy {/erefref_auxqrefufsphy/V^okays,ufs@1d84000+2qcom,sm8650-ufshcqcom,ufshcjedec,ufs-2.0@0   @{///////necore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@-JJJ/rst0Z12%qufs-ddrcpu-ufs/; J.`I],ufsphy^okay 6Mqf wOscrypto@1d88000;2qcom,sm8650-inline-crypto-engineqcom,inline-crypto-engine؀{/shwlock@1f400002qcom,tcsr-mutexs%clock-controller@1fc00002qcom,sm8650-tcsrsyscon {Vsgpu@3d00000!2qcom,adreno-43051401qcom,adreno0 #|kgsl_3d0_reg_memorycx_memcx_dbgc  ,J%^okayszap-shaderqcom/sm8650/gen70900_zap.mbnopp-table2operating-points-v2sopp-231000000 4opp-310000000z98opp-366000000з<opp-422000000'5@opp-500000000ePopp-578000000"sopp-629000000%}@opp-680000000(opp-720000000*Topp-770000000-Dopp-8340000001Ԁ@gmu@3d6a000&2qcom,adreno-gmu-750.1qcom,adreno-gmu0֠P (|gmursccgmu_pdc 01hfigmu8{/ /"!eahbgmucxoaximemnochubdemetcxgx Jsopp-table2operating-points-v2sopp-260000000I@opp-625000000%@@clock-controller@3d900002qcom,sm8650-gpucc{'/ /!Vsiommu@3da0000@2qcom,sm8650-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-5008 >?@A {/"/#ehlosbusifaceahbQsipa@3f40000 2qcom,sm8650-ipaqcom,sm8550-ipaJ..0P@|ipa-regipa-sharedgsi8l(ipagsiipa-clock-queryipa-setup-ready{ ecore012qmemoryconfig*'ipa-clock-enabled-validipa-clock-enabled^okay=selfqcom/sm8650/ipa_fws.mbnshremoteproc@40800002qcom,sm8650-mpss-pas@@Ll0wdogfatalreadyhandoverstop-ackshutdown-ack{exo cxmss'stop^okay0qcom/sm8650/modem.mbnqcom/sm8650/modem_dtb.mbnsiglink-edgel& &Mmpsscodec@6aa000082qcom,sm8650-lpass-wsa-macroqcom,sm8550-lpass-wsa-macro({DfgemclkmacrodcodecfsgenV wsa2-mclkSssoundwire@6ab00002qcom,soundwire-v2.0.0  {eifaceMWSA2defaultds ??         0 S ^disabledsjcodec@6ac000062qcom,sm8650-lpass-rx-macroqcom,sm8550-lpass-rx-macro({@fgemclkmacrodcodecfsgenVmclkSssoundwire@6ad00002qcom,soundwire-v2.0.0  {eifaceMRXdefaultds 1          0 S^okayscodec@0,42sdw20217010e00H scodec@6ae000062qcom,sm8650-lpass-tx-macroqcom,sm8550-lpass-tx-macro({9fgemclkmacrodcodecfsgenVmclkSscodec@6b0000082qcom,sm8650-lpass-wsa-macroqcom,sm8550-lpass-wsa-macro({BfgemclkmacrodcodecfsgenVmclkSssoundwire@6b100002qcom,soundwire-v2.0.0  {eifaceMWSAdefaultds ??         0 S^okaysspeaker@0,02sdw20217020400default ]S mSpkrLeftIH sspeaker@0,12sdw20217020400default ]MMS mSpkrRightIH ssoundwire@6d300002qcom,soundwire-v2.0.0  corewakeup{eifaceMTXdefaultds0 S^okayscodec@0,32sdw20217010e00scodec@6d4400062qcom,sm8650-lpass-va-macroqcom,sm8550-lpass-va-macro@${9fgemclkmacrodcodecVfsgenSspinctrl@6e800002qcom,sm8650-lpass-lpi-pinctrl{fg ecoreaudiostx-swr-active-statesclk-pins gpio0 swr_tx_clk  ! +data-pins gpio1gpio2gpio14 swr_tx_data  ! 8rx-swr-active-statesclk-pins gpio3 swr_rx_clk  ! +data-pins gpio4gpio5 swr_rx_data  ! 8dmic01-default-stateskclk-pins gpio6 dmic1_clk  Fdata-pins gpio7 dmic1_data  Rdmic23-default-stateslclk-pins gpio8 dmic2_clk  Fdata-pins gpio9 dmic2_data  Rwsa-swr-active-statesclk-pins gpio10 wsa_swr_clk  ! +data-pins gpio11 wsa_swr_data  ! 8wsa2-swr-active-statesclk-pins gpio15 wsa2_swr_clk  ! +data-pins gpio16 wsa2_swr_data  ! 8spkr-1-sd-n-active-state gpio21 gpio  + _sinterconnect@74000002qcom,sm8650-lpass-lpiaon-noc@sminterconnect@74300002qcom,sm8650-lpass-lpicx-nocCsinterconnect@7e400002qcom,sm8650-lpass-ag-nocsnmmc@8804000$2qcom,sm8650-sdhciqcom,sdhci-msm-v5@ hc_irqpwr_irq{//eifacecorexo012 qsdhc-ddrcpu-sdhc J.@ j t d, hQ^okay      defaultsleepsoopp-table2operating-points-v2sopp-19200000$;opp-50000000;opp-100000000;opp-202000000 F;clock-controller@aaf00002qcom,sm8650-videocc  {'/Vspclock-controller@ade00002qcom,sm8650-camcc {/'()Vsqdisplay-subsystem@ae000002qcom,sm8650-mdss |mdss  S{/=01qmdp0-memmdp1-mem J. =^okaysdisplay-controller@ae010002qcom,sm8650-dpu   |mdpvbifl({/@=Ienrt_busifacelutcorevsyncI$srports port@0endpointasport@1endpointasport@2endpointasopp-table2operating-points-v2sopp-200000000 ;opp-325000000_@;opp-375000000Z ;opp-514000000;dsi@ae94000(2qcom,sm8650-dsi-ctrlqcom,mdss-dsi-ctrl @ |dsi_ctrll0{B8/$ebytebyte_intfpixelcoreifacebusC dsi ^okay sspanel@0defaultsleep +'_ 6M2visionox,vtdr6130portendpointsatports port@0endpointasport@1endpointa stopp-table2operating-points-v2sopp-187500000 -;opp-300000000;opp-358000000V;phy@ae950002qcom,sm8650-dsi-phy-4nm0 P R U|dsi_phydsi_phy_lanedsi_pll{ eifacerefV^okay sdsi@ae96000(2qcom,sm8650-dsi-ctrlqcom,mdss-dsi-ctrl ` |dsi_ctrll0{ D:/$ebytebyte_intfpixelcoreifacebus E dsi  ^disabledstports port@0endpointasport@1endpointsuphy@ae970002qcom,sm8650-dsi-phy-4nm0 p r u|dsi_phydsi_phy_lanedsi_pll{ eifacerefV ^disabledsdisplayport-controller@af540002qcom,sm8650-dpP @ B Pp ` pl ({ ;ecore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel ---dpS^okaysvopp-table2operating-points-v2sopp-162000000 ;opp-270000000߀;opp-540000000 /;opp-8100000000G;ports port@0endpointasport@1endpointa sclock-controller@af000002qcom,sm8650-dispcc \{'(/)--;V^okaysphy@88e300062qcom,sm8650-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy0T{eref/^okay+ sphy@88e80002qcom,sm8650-qmp-usb3-dp-phy0 {///eauxrefcom_auxusb3_pipe// phycommon/VN^okays-ports port@0endpointas port@1endpointasport@2endpointasusb@a6f88002qcom,sm8650-dwc3qcom,dwc3 oDl<pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq0{/ ////&ecfg_noccoreifacesleepmock_utmixo//$ //; =^okayswusb@a600000 2snps,dwc3 `   J.@ -usb2-phyusb3-phy ' ; X q       Q !otg )sxports port@0endpointas port@1endpointasinterrupt-controller@b2200002qcom,sm8650-pdcqcom,pdc "@dH 9^^a}?~ sthermal-sensor@c228000 2qcom,sm8650-tsensqcom,tsens-v2 " "  uplowcritical I Wsthermal-sensor@c229000 2qcom,sm8650-tsensqcom,tsens-v2 " "0 uplowcritical I Wsthermal-sensor@c22a000 2qcom,sm8650-tsensqcom,tsens-v2 " "@ uplowcritical I  Wspower-management@c300000#2qcom,sm8650-aoss-qmpqcom,aoss-qmp 0&l& &Vssram@c3f00002qcom,rpmh-stats ?spmi@c4000002qcom,spmi-pmic-arbP @0 P@ D L B@|corechnlsobsrvrintrcnfg l periph_irq  m z sypmic@c2qcom,pm8010qcom,spmi-pmic  sztemp-alarm@24002qcom,spmi-temp-alarm$ $ Wspmic@d2qcom,pm8010qcom,spmi-pmic  s{temp-alarm@24002qcom,spmi-temp-alarm$ $ Wspmic@12qcom,pm8550qcom,spmi-pmic s|temp-alarm@a002qcom,spmi-temp-alarm    Wsgpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio ssdc2-card-det-state gpio12 normal  R  svolume-up-n-state gpio6 normal  R sled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led ^disableds}pwm!2qcom,pm8550-pwmqcom,pm8350c-pwm ^okay s~led@1 status  offled@2 status  offled@3 status  offpmic@72qcom,pm8550qcom,spmi-pmic stemp-alarm@a002qcom,spmi-temp-alarm    Wsgpio@8800!2qcom,pm8550b-gpioqcom,spmi-gpio sphy@fd002qcom,pm8550b-eusb2-repeater I spmic@82qcom,pm8550qcom,spmi-pmic stemp-alarm@a002qcom,spmi-temp-alarm    Wsgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpiospmic@22qcom,pm8550qcom,spmi-pmic stemp-alarm@a002qcom,spmi-temp-alarm    Wsgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpiospmic@32qcom,pm8550qcom,spmi-pmic stemp-alarm@a002qcom,spmi-temp-alarm    Wsgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpiospmic@42qcom,pm8550qcom,spmi-pmic stemp-alarm@a002qcom,spmi-temp-alarm    Wsgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpiospmic@62qcom,pm8550qcom,spmi-pmic stemp-alarm@a002qcom,spmi-temp-alarm    Wsgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpiospmic@02qcom,pm8550qcom,spmi-pmic spon@13002qcom,pmk8350-pon |hlospbsspwrkey2qcom,pmk8350-pwrkey  t^okaysresin2qcom,pmk8350-resin ^okay rsrtc@61002qcom,pmk8350-rtcab |rtcalarm b^okaysnvram@71002qcom,spmi-sdamq  =qsreboot-reason@48H sgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpiospinctrl@f1000002qcom,sm8650-tlmm0  M   JsMts-reset-states   gpio62 gpio162ts-irq-states    gpio61 gpio161mdp-vsync-states   mdp_vsync gpio86-disp0-reset-n-suspend-states   gpio33 gpio133disp0-reset-n-active-states +  gpio33 gpio133hub-i2c0-data-clk-state gpio64gpio65 i2chub0_se0  sPhub-i2c1-data-clk-state gpio66gpio67 i2chub0_se1  sQhub-i2c2-data-clk-state gpio68gpio69 i2chub0_se2  sRhub-i2c3-data-clk-state gpio70gpio71 i2chub0_se3  sShub-i2c4-data-clk-state gpio72gpio73 i2chub0_se4  sThub-i2c5-data-clk-state gpio74gpio75 i2chub0_se5  sUhub-i2c6-data-clk-state gpio76gpio77 i2chub0_se6  sVhub-i2c7-data-clk-state gpio78gpio79 i2chub0_se7  sWhub-i2c8-data-clk-state gpio206gpio207 i2chub0_se8  sXhub-i2c9-data-clk-state gpio80gpio81 i2chub0_se9  sYpcie0-default-states~perst-pins gpio94 gpio  clkreq-pins gpio95 pcie0_clk_req_n  wake-pins gpio96 gpio  pcie1-default-statesperst-pins gpio97 gpio  clkreq-pins gpio98 pcie1_clk_req_n  wake-pins gpio99 gpio  qup-i2c0-data-clk-state gpio32gpio33 qup1_se0  s\qup-i2c1-data-clk-state gpio36gpio37 qup1_se1  s_qup-i2c2-data-clk-state gpio40gpio41 qup1_se2  sbqup-i2c3-data-clk-state gpio44gpio45 qup1_se3  sequp-i2c4-data-clk-state gpio48gpio49 qup1_se4  siqup-i2c5-data-clk-state gpio52gpio53 qup1_se5  slqup-i2c6-data-clk-state gpio56gpio57 qup1_se6  soqup-i2c7-data-clk-state gpio60gpio61 qup1_se7  sxqup-i2c8-data-clk-state gpio0gpio1 qup2_se0  s4qup-i2c9-data-clk-state gpio4gpio5 qup2_se1  s7qup-i2c10-data-clk-state gpio8gpio9 qup2_se2  s:qup-i2c11-data-clk-state gpio12gpio13 qup2_se3  s=qup-i2c12-data-clk-state gpio16gpio17 qup2_se4  s@qup-i2c13-data-clk-state gpio20gpio21 qup2_se5  sCqup-i2c14-data-clk-state gpio24gpio25 qup2_se6  squp-spi0-cs-state gpio35 qup1_se0  +s^qup-spi0-data-clk-state gpio32gpio33gpio34 qup1_se0  +s]qup-spi1-cs-state gpio39 qup1_se1  +saqup-spi1-data-clk-state gpio36gpio37gpio38 qup1_se1  +s`qup-spi2-cs-state gpio43 qup1_se2  +sdqup-spi2-data-clk-state gpio40gpio41gpio42 qup1_se2  +scqup-spi3-cs-state gpio47 qup1_se3  +shqup-spi3-data-clk-state gpio44gpio45gpio46 qup1_se3  +sgqup-spi4-cs-state gpio51 qup1_se4  +skqup-spi4-data-clk-state gpio48gpio49gpio50 qup1_se4  +sjqup-spi5-cs-state gpio55 qup1_se5  +snqup-spi5-data-clk-state gpio52gpio53gpio54 qup1_se5  +smqup-spi6-cs-state gpio59 qup1_se6  +swqup-spi6-data-clk-state gpio56gpio57gpio58 qup1_se6  +svqup-spi7-cs-state gpio63 qup1_se7  +szqup-spi7-data-clk-state gpio60gpio61gpio62 qup1_se7  +syqup-spi8-cs-state gpio3 qup2_se0  +s6qup-spi8-data-clk-state gpio0gpio1gpio2 qup2_se0  +s5qup-spi9-cs-state gpio7 qup2_se1  +s9qup-spi9-data-clk-state gpio4gpio5gpio6 qup2_se1  +s8qup-spi10-cs-state gpio11 qup2_se2  +s<qup-spi10-data-clk-state gpio8gpio9gpio10 qup2_se2  +s;qup-spi11-cs-state gpio15 qup2_se3  +s?qup-spi11-data-clk-state gpio12gpio13gpio14 qup2_se3  +s>qup-spi12-cs-state gpio19 qup2_se4  +sBqup-spi12-data-clk-state gpio16gpio17gpio18 qup2_se4  +sAqup-spi13-cs-state gpio23 qup2_se5  +sEqup-spi13-data-clk-state gpio20gpio21gpio22 qup2_se5  +sDqup-spi14-cs-state gpio27 qup2_se6  +squp-spi14-data-clk-state gpio24gpio25gpio26 qup2_se6  +squp-uart14-default-state gpio26gpio27 qup2_se6  sFqup-uart14-cts-rts-state gpio24gpio25 qup2_se6  sGqup-uart15-default-state gpio30gpio31 qup2_se7  +sOsdc2-sleep-statesclk-pins sdc2_clk  +cmd-pins sdc2_cmd  data-pins sdc2_data  sdc2-default-statesclk-pins sdc2_clk  +cmd-pins sdc2_cmd   data-pins sdc2_data   bt-default-statesNbt-en-pins gpio17 gpio  +sw-ctrl-pins gpio18 gpio lt9611-irq-state gpio85 gpio +srlt9611-rst-state gpio28 gpio Fssspkr-2-sd-n-active-state gpio77 gpio  + _swcd-reset-n-active-state gpio107 gpio  + _swlan-en-state gpio16 gpio  siommu@15000000/2qcom,sm8650-smmu-500qcom,smmu-500arm,mmu-500 Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYQs.interrupt-controller@17100000 2arm,gic-v3      ) @ =smsi-controller@171400002arm,gic-v3-its U ds}timer@174200002arm,armv7-timer-memB=  frame@17421000BB   oframe@17423000B0   o ^disabledframe@17425000BP   o ^disabledframe@17427000Bp   o ^disabledframe@17429000B   o ^disabledframe@1742b000B   o ^disabledframe@1742d000B   o ^disabledrsc@17a000002qcom,rpmh-rsc@|drv-0drv-1drv-2$  |    Mapps_rscsbcm-voter2qcom,bcm-votersclock-controller2qcom,sm8650-rpmh-clk{exoVspower-controller2qcom,sm8650-rpmhpdsopp-table2operating-points-v2sopp-16sopp-480sopp-524sopp-568sopp-60<sopp-64@sopp-80Psopp-128sopp-144sopp-192sopp-256sopp-320@sopp-336Psopp-384sopp-416sregulators-02qcom,pm8550-rpmh-regulators    K    K /L >L M \bbob1 ivreg_bob1 x2K 2qcom,sm8650-pmic-glinkqcom,sm8550-pmic-glinkqcom,pmic-glink  Mconnector@02usb-c-connector.dual9dualports port@0endpointa sport@1endpointa sport@2endpointa sfregulator-lt9611-1v2 ^disabled-fi2regulator-fixed iLT9611_1V2 xO OC NMOSspregulator-lt9611-3v3 ^disabled-fi2regulator-fixed iLT9611_3V3 x2Z 2ZC  NMNSsqsound(2qcom,sm8650-sndcardqcom,sm8450-sndcard ,SM8650-HDKfSpkrLeft INWSA_SPK1 OUTSpkrRight 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&/audio-codec&/wcn7850-pmu/regulators/ldo0&/wcn7850-pmu/regulators/ldo1&/wcn7850-pmu/regulators/ldo2&/wcn7850-pmu/regulators/ldo3&/wcn7850-pmu/regulators/ldo4'/wcn7850-pmu/regulators/ldo5'/wcn7850-pmu/regulators/ldo6'*/wcn7850-pmu/regulators/ldo7';/wcn7850-pmu/regulators/ldo8'M/wcn7850-pmu/regulators/ldo9 interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typestdout-path#clock-cellsclock-frequencyphandleclocksclock-multclock-divdevice_typeregpower-domainspower-domain-namesenable-methodnext-level-cachecapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domain#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopqcom,dload-modeinterconnects#interconnect-cellsqcom,bcm-votersinterrupts#power-domain-cellsdomain-idle-statesrangesno-maphwlocksqcom,client-idqcom,vmidinterrupts-extendedmboxesqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusdma-coherentstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesvddio-supplyvddaon-supplyvdddig-supplyvddrfa0p8-supplyvddrfa1p2-supplyvddrfa1p9-supplymax-speedenable-gpiosswctrl-gpiosvdd-supplyreset-gpiosmode-switchorientation-switchremote-endpointvcc-supplyreg-namesinterrupt-namesresetsreset-namesiommu-mapinterrupt-mapinterrupt-map-maskmsi-mapmsi-map-masklinux,pci-domainnum-lanesbus-rangephysphy-nameswake-gpiosperst-gpiosvddrfacmn-supplyvddwlcx-supplyvddwlmx-supplyvddrfa1p8-supplyvddpcie0p9-supplyvddpcie1p8-supplyassigned-clocksassigned-clock-ratesclock-output-names#phy-cellsvdda-phy-supplyvdda-pll-supplyvdda-qref-supplyqcom,eeqcom,controlled-remotelyfreq-table-hzrequired-oppslanes-per-directionqcom,icevcc-max-microampvccq-supplyvccq-max-microamp#hwlock-cellsoperating-points-v2qcom,gmumemory-regionfirmware-nameopp-hzopp-levelqcom,qmp#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-namesqcom,gsi-loaderlabel#sound-dai-cellsqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlqcom,rx-port-mappingpowerdown-gpiossound-name-prefixvdd-1p8-supplyvdd-io-supplyqcom,port-mappingqcom,ports-sinterval-lowqcom,tx-port-mappinggpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowbus-widthsdhci-caps-maskqcom,dll-configqcom,ddr-configcd-gpiosvmmc-supplyvqmmc-supplyno-sdiono-mmcpinctrl-1assigned-clock-parentsvdda-supplydata-lanesvdds-supplyvdda12-supplysnps,hird-thresholdsnps,usb2-gadget-lpm-disablesnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,is-utmi-l1-suspendsnps,usb3_lpm_capablesnps,usb2-lpm-disablesnps,has-lpm-erratumtx-fifo-resizedr_modeusb-role-switchqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,channelqcom,bus-idbias-pull-upoutput-disablepower-source#pwm-cellscolordefault-statevdd18-supplyvdd3-supplylinux,codebitswakeup-parentgpio-reserved-rangesbias-pull-down#redistributor-regionsredistributor-stridemsi-controller#msi-cellsframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configvdd-bob1-supplyvdd-bob2-supplyvdd-l2-l13-l14-supplyvdd-l3-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l11-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyqcom,pmic-idregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-allow-set-loadregulator-allowed-modesvdd-l1-supplyvdd-l2-supplyvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-l1-l2-supplyvdd-l3-l4-supplyvdd-l5-supplyvdd-l6-supplyvdd-l7-supply#freq-domain-cellsopp-peak-kBpsqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intentsqcom,protection-domainthermal-sensorstemperaturehysteresispolling-delay-passivetripcooling-devicenvmem-cellsnvmem-cell-namesmode-recoverymode-bootloaderserial0serial1debounce-intervallinux,can-disablewakeup-sourcelinux,default-triggerpanic-indicatororientation-gpiospower-roledata-rolevin-supplygpioenable-active-highaudio-routinglink-namesound-dairegulator-always-onregulator-boot-onqcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicevdd-buck-supplyvdd-rxtx-supplyvdd-mic-bias-supplywlan-enable-gpiosvddio1p2-supplyxo_boardsleep_clkbi_tcxo_div2bi_tcxo_ao_div2CPU0L2_0L3_0CPU1CPU2L2_200CPU3CPU4L2_400CPU5L2_500CPU6L2_600CPU7L2_700SILVER_CPU_SLEEP_0GOLD_CPU_SLEEP_0GOLD_PLUS_CPU_SLEEP_0CLUSTER_SLEEP_0CLUSTER_SLEEP_1scmclk_virtmc_virtCPU_PD0CPU_PD1CPU_PD2CPU_PD3CPU_PD4CPU_PD5CPU_PD6CPU_PD7CLUSTER_PDreserved_memoryhyp_memcpusys_vm_memxbl_dt_log_merged_memaop_cmd_db_memaop_tme_uefi_merged_memadsp_mhi_mempvmfw_memglobal_sync_memtz_stat_memqdss_memqlink_logging_memmpss_dsm_memmpss_dsm_mem_2mpss_memq6_mpss_dtb_memipa_fw_memipa_gsi_memgpu_micro_code_memspss_region_memspu_tz_shared_memspu_modem_shared_memcamera_memvideo_memcvp_memcdsp_memq6_cdsp_dtb_memq6_adsp_dtb_memadspslpi_memrmtfs_memtz_merged_memhwfence_shbuftr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