8(=hoperun,hihope-rzg2-exhoperun,hihope-rzg2mrenesas,r8a774a1 %&HopeRun HiHope RZ/G2M with sub boardaudio_clk_a fixed-clock,9XI=audio_clk_b fixed-clock,9audio_clk_c fixed-clock,9I>can fixed-clock,9I(opp-table-0operating-points-v2QI opp-500000000\ec qopp-1000000000\;c qopp-1500000000\Yh/c qopp-table-1operating-points-v2QI opp-800000000\/c qopp-1000000000\;c qopp-1200000000\Gc qcpus cpu-mapcluster0core0core1cluster1core0core1core2core3cpu@0arm,cortex-a57cpupsciV  Icpu@1arm,cortex-a57cpupsci  Icpu@100arm,cortex-a53cpu psci  0Icpu@101arm,cortex-a53cpu psci  0Icpu@102arm,cortex-a53cpu psci  0Icpu@103arm,cortex-a53cpu psci  0Icache-controller-0cache &4Icache-controller-1cache&4I extal fixed-clock,9P*Iextalr fixed-clock,9Ipcie_bus fixed-clock,9IXpmu_a53arm,cortex-a53-pmu@@ T U V WTpmu_a57arm,cortex-a57-pmu @ H ITpsciarm,psci-1.0arm,psci-0.2smcscif fixed-clock,9Isoc simple-busg  xwatchdog@e6020000+renesas,r8a774a1-wdtrenesas,rcar-gen3-wdt     okay<gpio@e6050000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioP    Igpio@e6051000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioP     lvds-connector-en-hog lvds-connector-en-gpiogpio@e6052000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpio P @   I'gpio@e6053000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpio0P `   Igpio@e6054000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpio@P    Igpio@e6055000-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioPP     gpio@e6055400-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioTP      Iusb1-reset-hog   usb1-resetgpio@e6055800-renesas,gpio-r8a774a1renesas,rcar-gen3-gpioXP     pinctrl@e6060000renesas,pfc-r8a774a1  defaultIhscif0.hscif0_datahscif0_ctrl5hscif0Iscif2 .scif2_data_a5scif2I,scif_clk .scif_clk_a 5scif_clkIsd0.sdhi0_data4sdhi0_ctrl5sdhi0> IPsd0_uhs.sdhi0_data4sdhi0_ctrl5sdhi0>IQsd2.sdhi2_data4sdhi2_ctrl5sdhi2>ITsd3 .sdhi3_data8sdhi3_ctrlsdhi3_ds5sdhi3>IVusb0.usb05usb0IMusb1IOmux.usb15usb1ovcKGP_6_27Pusb30.usb305usb30IGi2c2.i2c2_a5i2c2Isound_clk+.audio_clk_a_aaudio_clk_b_aaudio_clkout_a 5audio_clkI@sound$.ssi01239_ctrlssi0_datassi1_data_a5ssiI?avbI%mux.avb_linkavb_mdioavb_mii5avbpins_mdio .avb_mdio]pins_mii_txKKPIN_AVB_TX_CTLPIN_AVB_TXCPIN_AVB_TD0PIN_AVB_TD1PIN_AVB_TD2PIN_AVB_TD3] can0 .can0_data_a5can0I)can1 .can1_data5can1I*pwm0.pwm05pwm0I+timer@e60f0000-renesas,r8a774a1-cmt0renesas,rcar-gen3-cmt0 /lfck  / disabledtimer@e6130000-renesas,r8a774a1-cmt1renesas,rcar-gen3-cmt1`xyz{|}~ .lfck  . disabledtimer@e6140000-renesas,r8a774a1-cmt1renesas,rcar-gen3-cmt1` -lfck  - disabledtimer@e6148000-renesas,r8a774a1-cmt1renesas,rcar-gen3-cmt1` ,lfck  , disabledclock-controller@e6150000renesas,r8a774a1-cpg-mssr  lextalextalr,xI reset-controller@e6160000renesas,r8a774a1-rstsystem-controller@e6180000renesas,r8a774a1-syscxIthermal@e6198000renesas,r8a774a1-thermal0$CDE     I}interrupt-controller@e61c0000&renesas,intc-ex-r8a774a1renesas,irqcH   timer@e61e0000!renesas,tmu-r8a774a1renesas,tmu0$tuni0tuni1tuni2 }lfck  } disabledtimer@e6fc0000!renesas,tmu-r8a774a1renesas,tmu00tuni0tuni1tuni2ticpi2 |lfck  | disabledtimer@e6fd0000!renesas,tmu-r8a774a1renesas,tmu00/012tuni0tuni1tuni2ticpi2 {lfck  { disabledtimer@e6fe0000!renesas,tmu-r8a774a1renesas,tmu0$tuni0tuni1tuni2 zlfck  z disabledtimer@ffc00000!renesas,tmu-r8a774a1renesas,tmu0$tuni0tuni1tuni2 ylfck  y disabledi2c@e6500000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cP@      txrxtxrxn disabledi2c@e6508000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cP@       txrxtxrx disabledi2c@e6510000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cQ@      txrxtxrxokay defaultclk_multiplier@4f,cirrus,cs2000-cpOlclk_inref_clkwIi2c@e66d0000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cm@ "   txrxn disabledi2c@e66d8000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cm@    txrxnokay9clock-generator@6aidt,5p49v5923j,lxinIti2c@e66e0000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cn@    txrxn disabledi2c@e66e8000 +renesas,i2c-r8a774a1renesas,rcar-gen3-i2cn@    txrx disabledi2c@e60b0000 ?renesas,iic-r8a774a1renesas,rcar-gen3-iicrenesas,rmobile-iic %    txrx disabledserial@e6540000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifT`   lfckbrg_intscif_clk 1010 txrxtxrx  okay default bluetooth ti,wl1837-st  serial@e6550000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifU`   lfckbrg_intscif_clk 3232 txrxtxrx   disabledserial@e6560000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifV`   lfckbrg_intscif_clk 5454 txrxtxrx   disabledserial@e66a0000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifj`   lfckbrg_intscif_clk76txrx   disabledserial@e66b0000=renesas,hscif-r8a774a1renesas,rcar-gen3-hscifrenesas,hscifk`   lfckbrg_intscif_clk98txrx   disabledusb@e6590000/renesas,usbhs-r8a774a1renesas,rcar-gen3-usbhsY k   ch0ch1ch2ch3* :?usb   okayIotgclock-controller@e6590630Frenesas,r8a774a1-rcar-usb2-clock-selrenesas,rcar-gen3-usb2-clock-selY0   !'lehci_ohcihs-usb-ifusb_extalusb_xtal,   Qehci_ohcihs-usb-if disableddma-controller@e65a0000+renesas,r8a774a1-usb-dmacrenesas,usb-dmacZmmch0ch1 J  J]hIdma-controller@e65b0000+renesas,r8a774a1-usb-dmacrenesas,usb-dmac[nnch0ch1 K  K]hIusb-phy@e65ee0005renesas,r8a774a1-usb3-phyrenesas,rcar-gen3-usb3-phy^ H! lusb3-ifusb3s_clkusb_extal  HuokayIHdma-controller@e6700000(renesas,dmac-r8a774a1renesas,rcar-dmacpLerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 lfck  ]h"""""""""" " " " " ""Idma-controller@e7300000(renesas,dmac-r8a774a1renesas,rcar-dmac0456789:;<=>?Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 lfck  ]h########## # # # # ##Idma-controller@e7310000(renesas,dmac-r8a774a1renesas,rcar-dmac1Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 lfck  ]h################Iiommu@e6740000renesas,ipmmu-r8a774a1t$ I"iommu@e7740000renesas,ipmmu-r8a774a1t$ I#iommu@e6570000renesas,ipmmu-r8a774a1W$ IYiommu@e67b0000renesas,ipmmu-r8a774a1{ I$iommu@ec670000renesas,ipmmu-r8a774a1g$ IFiommu@fd800000renesas,ipmmu-r8a774a1$ iommu@fd950000renesas,ipmmu-r8a774a1$ iommu@fe6b0000renesas,ipmmu-r8a774a1k$I\iommu@febd0000renesas,ipmmu-r8a774a1$  I[ethernet@e68000005renesas,etheravb-r8a774a1renesas,etheravb-rcar-gen3,'()*+,-./0123456789:;<=>?sch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15ch16ch17ch18ch19ch20ch21ch22ch23ch24 ,lfck  ,rgmii" okay% default&ethernet-phy@04ethernet-phy-id001c.c915ethernet-phy-ieee802.3-c22g'  ' I&can@e6c30000+renesas,can-r8a774a1renesas,rcar-gen3-can   .(lclkp1clkp2can_clk  .bZ  okay) defaultcan@e6c38000+renesas,can-r8a774a1renesas,rcar-gen3-canÀ   .(lclkp1clkp2can_clk  .bZ  okay* defaultcan@e66c0000/renesas,r8a774a1-canfdrenesas,rcar-gen3-canfdl ch_intg_int  .(lfckcanfdcan_clk  .bZ   disabledchannel0 disabledchannel1 disabledpwm@e6e30000&renesas,pwm-r8a774a1renesas,pwm-rcar     okay+ defaultIpwm@e6e31000&renesas,pwm-r8a774a1renesas,pwm-rcar      disabledpwm@e6e32000&renesas,pwm-r8a774a1renesas,pwm-rcar       disabledpwm@e6e33000&renesas,pwm-r8a774a1renesas,pwm-rcar0      disabledpwm@e6e34000&renesas,pwm-r8a774a1renesas,pwm-rcar@      disabledpwm@e6e35000&renesas,pwm-r8a774a1renesas,pwm-rcarP      disabledpwm@e6e36000&renesas,pwm-r8a774a1renesas,pwm-rcar`      disabledserial@e6e60000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@   lfckbrg_intscif_clk QPQP txrxtxrx   disabledserial@e6e68000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@   lfckbrg_intscif_clk SRSR txrxtxrx   disabledserial@e6e88000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@  6 lfckbrg_intscif_clk  txrxtxrx  6okay, defaultserial@e6c50000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@   lfckbrg_intscif_clkWVtxrx   disabledserial@e6c40000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@   lfckbrg_intscif_clkYXtxrx   disabledserial@e6f30000:renesas,scif-r8a774a1renesas,rcar-gen3-scifrenesas,scif@   lfckbrg_intscif_clk [Z[Z txrxtxrx   disabledspi@e6e90000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd   A@A@ txrxtxrx    disabledspi@e6ea0000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd   CBCB txrxtxrx    disabledspi@e6c00000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd  EDtxrx    disabledspi@e6c10000/renesas,msiof-r8a774a1renesas,rcar-gen3-msiofd  GFtxrx    disabledvideo@e6ef0000renesas,vin-r8a774a1  +  + disabledports port@1 endpoint@0-Ibendpoint@2.Ijvideo@e6ef1000renesas,vin-r8a774a1  *  * disabledports port@1 endpoint@0/Icendpoint@20Ikvideo@e6ef2000renesas,vin-r8a774a1   )  ) disabledports port@1 endpoint@01Idendpoint@22Ilvideo@e6ef3000renesas,vin-r8a774a10  (  ( disabledports port@1 endpoint@03Ieendpoint@24Imvideo@e6ef4000renesas,vin-r8a774a1@  '  ' disabledports port@1 endpoint@05Ifendpoint@26Invideo@e6ef5000renesas,vin-r8a774a1P  &  & disabledports port@1 endpoint@07Igendpoint@28Iovideo@e6ef6000renesas,vin-r8a774a1`  %  % disabledports port@1 endpoint@09Ihendpoint@2:Ipvideo@e6ef7000renesas,vin-r8a774a1p  $  $ disabledports port@1 endpoint@0;Iiendpoint@2<Iqsound@ec5000004renesas,rcar_sound-r8a774a1renesas,rcar_sound-gen3PPZTTvscuadgssiussiaudmapp\                           => lssi-allssi.9ssi.8ssi.7ssi.6ssi.5ssi.4ssi.3ssi.2ssi.1ssi.0src.9src.8src.7src.6src.5src.4src.3src.2src.1src.0mix.1mix.0ctu.1ctu.0dvc.0dvc.1clk_aclk_bclk_cclk_i X           DQssi-allssi.9ssi.8ssi.7ssi.6ssi.5ssi.4ssi.3ssi.2ssi.1ssi.0okay?@ default!,9Drcar_sound,ctuctu-0ctu-1ctu-2ctu-3ctu-4ctu-5ctu-6ctu-7rcar_sound,dvcdvc-0Atxdvc-1Atxrcar_sound,mixmix-0mix-1rcar_sound,srcsrc-0 `BArxtxsrc-1 aBArxtxsrc-2 bBArxtxsrc-3 cBArxtxsrc-4 dBArxtxsrc-5 eBArxtxsrc-6 fBArxtxsrc-7 gBArxtxsrc-8 hBArxtxsrc-9 iBArxtxrcar_sound,ssissi-0 rBArxtxssi-1 sBArxtxssi-2 tBArxtxIEssi-3 uBArxtxssi-4 vB A rxtxssi-5 wB A rxtxssi-6 xB Arxtxssi-7 yBArxtxssi-8 zBArxtxssi-9 {BArxtxrcar_sound,ssiussiu-0BArxtxssiu-1B5A6rxtxssiu-2B7A8rxtxssiu-3BGAHrxtxssiu-4B?A@rxtxssiu-5BCADrxtxssiu-6BOAPrxtxssiu-7BSATrxtxssiu-8BIAJrxtxssiu-9BKALrxtxssiu-10BWAXrxtxssiu-11BYAZrxtxssiu-12B_A`rxtxssiu-13BArxtxssiu-14BArxtxssiu-15BArxtxssiu-16BcAdrxtxssiu-17BgAhrxtxssiu-18BkAlrxtxssiu-19BmAnrxtxssiu-20BArxtxssiu-21BArxtxssiu-22BArxtxssiu-23BArxtxssiu-24BoAprxtxssiu-25B!A"rxtxssiu-26B#A$rxtxssiu-27B%A&rxtxssiu-28B'A(rxtxssiu-29B)A*rxtxssiu-30B+A,rxtxssiu-31B-A.rxtxssiu-32BqArrxtxssiu-33BArxtxssiu-34BArxtxssiu-35BArxtxssiu-36BArxtxssiu-37BA rxtxssiu-38B1A2rxtxssiu-39B3A4rxtxssiu-40BsAtrxtxssiu-41BuAvrxtxssiu-42ByAzrxtxssiu-43B{A|rxtxssiu-44B}A~rxtxssiu-45BArxtxssiu-46BArxtxssiu-47BArxtxssiu-48BArxtxssiu-49BArxtxssiu-50BArxtxssiu-51BArxtxportIendpointC2i2s=DMDZEIDdma-controller@ec700000(renesas,dmac-r8a774a1renesas,rcar-dmacp^@ABCDEFGHIJKLMNOLerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 lfck  ]hFFFFFFFFFF F F F F FFIBdma-controller@ec720000(renesas,dmac-r8a774a1renesas,rcar-dmacr_PQRSTUVWXYZ[\]~Lerrorch0ch1ch2ch3ch4ch5ch6ch7ch8ch9ch10ch11ch12ch13ch14ch15 lfck  ]hFFFFFFFFFFFFFFFFIAusb@ee000000-renesas,xhci-r8a774a1renesas,rcar-gen3-xhci  f H  HokayG defaultIIusb@ee0200007renesas,r8a774a1-usb3-perirenesas,rcar-gen3-usb3-peri h H  Hokay:H?usbcIusb@ee080000 generic-ohci l  :?usb   okayIKusb@ee0a0000 generic-ohci  p :J?usb  okayILusb@ee080100 generic-ehci l  :?usbcK   okayusb@ee0a0100 generic-ehci  p :J?usbcL  okayusb-phy@ee0802005renesas,usb2-phy-r8a774a1renesas,rcar-gen3-usb2-phy l     uokayM defaultmNIusb-phy@ee0a02005renesas,usb2-phy-r8a774a1renesas,rcar-gen3-usb2-phy    uokayO defaultIJmmc@ee100000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi   :  lcoreclkhy   :okayPQ defaultstate_uhsRS  mmc@ee120000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi   9  lcoreclkhy   9 disabledmmc@ee140000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi   8 ! lcoreclkhy   8okayT defaultU wlcore@2 ti,wl1837g'mmc@ee160000-renesas,sdhi-r8a774a1renesas,rcar-gen3-sdhi   7 # lcoreclkhy   7okayVV defaultstate_uhsRW$,spi@ee2000001renesas,r8a774a1-rpc-ifrenesas,rcar-gen3-rpc-if0  regsdirmapwbuf &     disabledinterrupt-controller@f1010000 arm,gic-400 @  ? lclk  I pcie@fe000000-renesas,pcie-r8a774a1renesas,pcie-rcar-gen3 Cpcipx 00B88MB$tuvX k t ?Xlpciepcie_bus  ?yYokaypcie@ee800000-renesas,pcie-r8a774a1renesas,pcie-rcar-gen3 Cpcipx BMB$X k  >Xlpciepcie_bus  >yYokaypcie-ep@fe0000003renesas,r8a774a1-pcie-eprenesas,rcar-gen3-pcie-epP 08)apb-basememory0memory1memory2memory3$tuv ?lpcie ?  disabledpcie-ep@ee8000003renesas,r8a774a1-pcie-eprenesas,rcar-gen3-pcie-epP )apb-basememory0memory1memory2memory3$ >lpcie >  disabledfdp1@fe940000 renesas,fdp1$  w wZfcp@fe950000 renesas,fcpf g gIZfcp@fe96f000 renesas,fcpv _ _I]fcp@fea27000 renesas,fcpvp [  [[I^fcp@fea2f000 renesas,fcpv Z  Z[ I_fcp@fea37000 renesas,fcpvp Y  Y[ I`fcp@fe9af000 renesas,fcpv c c\Iavsp@fe960000 renesas,vsp2   r r]vsp@fea20000 renesas,vsp2P  o  o^Ivvsp@fea28000 renesas,vsp2P  n  n_Iwvsp@fea30000 renesas,vsp2P  m  m`Ixvsp@fe9a0000 renesas,vsp2  w wacsi2@fea80000renesas,r8a774a1-csi2     disabledports port@0port@1 endpoint@0bI-endpoint@1cI/endpoint@2dI1endpoint@3eI3endpoint@4fI5endpoint@5gI7endpoint@6hI9endpoint@7iI;csi2@feaa0000renesas,r8a774a1-csi2     disabledports port@0port@1 endpoint@0jI.endpoint@1kI0endpoint@2lI2endpoint@3mI4endpoint@4nI6endpoint@5oI8endpoint@6pI:endpoint@7qI<hdmi@fead0000-renesas,r8a774a1-hdmirenesas,rcar-gen3-hdmi   ( liahbisfr  okayports port@0endpointrIyport@1endpointsIport@2endpointDICdisplay@feb00000renesas,du-r8a774a1$  8   tut*ldu.0du.1du.2dclkin.0dclkin.1dclkin.2   Qdu.0du.2okayvwxports port@0port@1endpointyIrport@2endpointzI{lvds@feb90000renesas,r8a774a1-lvds   okayports port@0endpoint{Izport@1endpoint|Ichipid@fff00044 renesas,prrDthermal-zonessensor1-thermal}"tripssensor1-crit criticalsensor2-thermal}"tripssensor2-crit criticalsensor3-thermal}"cooling-mapsmap0~  map1~  tripstrip-point1passiveI~sensor3-crit criticaltimerarm,armv8-timer@@  ? ?  ?  ?sec-physphysvirthyp-physusb3s0 fixed-clock,9I!usb_extal fixed-clock,9I aliases)/soc/i2c@e6500000./soc/i2c@e65080003/soc/i2c@e65100008/soc/i2c@e66d0000=/soc/i2c@e66d8000B/soc/i2c@e66e0000G/soc/i2c@e66e8000L/soc/i2c@e60b0000Q/soc/serial@e6e88000Y/soc/serial@e6540000a/soc/mmc@ee160000f/soc/mmc@ee100000k/soc/mmc@ee140000p/soc/ethernet@e6800000chosen'zignore_loglevel rw root=/dev/nfs ip=onserial0:115200n8hdmi0-outhdmi-connectoraportendpointIsleds gpio-ledsled1  led2  led3 led4  regulator-1p8vregulator-fixed fixed-1.8Vw@w@IWregulator-3p3vregulator-fixed fixed-3.3V2Z2ZIRsoundaudio-graph-card rcar-soundregulator-vbus0-usb2regulator-fixed USB20_VBUS0LK@LK@ INregulator-vccq-sdhi0regulator-gpio SDHI0 VccQw@2Z 2Zw@ISx302-clock fixed-clock,9@Iux304-clock fixed-clock,9}x@Iaudio-clkout fixed-clock,9Iregulator-wlan_enregulator-fixedwlan-en-regulatorw@w@$p IUx1801-clock fixed-clock,9wImemory@48000000memoryHxmemory@600000000memorybacklightpwm-backlight 5P : @Lpanel-lvds advantech,idk-1110wrpanel-lvdsen} xjeida-24panel-timing9 @X((  portendpointI| compatible#address-cells#size-cellsmodel#clock-cellsclock-frequencyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendcpuregdevice_typepower-domainsnext-level-cacheenable-methoddynamic-power-coefficientclocksoperating-points-v2capacity-dmips-mhz#cooling-cellscache-unifiedcache-levelinterrupts-extendedinterrupt-affinityinterrupt-parentrangesinterruptsresetsstatustimeout-sec#gpio-cellsgpio-controllergpio-ranges#interrupt-cellsinterrupt-controllergpio-hoggpiosoutput-lowline-namepinctrl-0pinctrl-namesgroupsfunctionpower-sourcepinsbias-pull-updrive-strengthclock-names#power-domain-cells#reset-cells#thermal-sensor-cellsinterrupt-namesdmasdma-namesi2c-scl-internal-delay-nsassigned-clocksassigned-clock-ratesuart-has-rtsctsenable-gpiosrenesas,buswaitphysphy-namesdr_modereset-names#dma-cellsdma-channels#phy-cellsiommusrenesas,ipmmu-main#iommu-cellsphy-moderx-internal-delay-pstx-internal-delay-psphy-handlereset-gpios#pwm-cellsrenesas,idremote-endpointreg-names#sound-dai-cellsdai-formatbitclock-masterframe-masterplaybackcompanionvbus-supplymax-frequencypinctrl-1vmmc-supplyvqmmc-supplycd-gpiosbus-widthsd-uhs-sdr50sd-uhs-sdr104non-removablecap-power-off-cardkeep-power-in-suspendmmc-hs200-1_8vno-sdno-sdiofixed-emmc-driver-typebus-rangedma-rangesinterrupt-map-maskinterrupt-mapiommu-mapiommu-map-maskrenesas,fcprenesas,vspspolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicecontributioni2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7serial0serial1mmc0mmc1mmc2ethernet0bootargsstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onlabeldaisgpioenable-active-highgpios-statesstartup-delay-uspwmsbrightness-levelsdefault-brightness-levelwidth-mmheight-mmdata-mappinghactivevactivehsync-lenhfront-porchhback-porchvfront-porchvback-porchvsync-len