8( %pine64,pinephone-prorockchip,rk3399 +7Pine64 PinePhone Pro=handsetaliasesJ/pinctrl/gpio@ff720000P/pinctrl/gpio@ff730000V/pinctrl/gpio@ff780000\/pinctrl/gpio@ff788000b/pinctrl/gpio@ff790000h/i2c@ff3c0000m/i2c@ff110000r/i2c@ff120000w/i2c@ff130000|/i2c@ff3d0000/i2c@ff140000/i2c@ff150000/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/spi@ff1c0000/spi@ff1d0000/spi@ff1e0000/spi@ff350000/spi@ff1f0000/spi@ff200000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53psci &5dO _l@~@   cpu@1cpuarm,cortex-a53psci &5dO _l@~@   cpu@2cpuarm,cortex-a53psci &5dO _l@~@   cpu@3cpuarm,cortex-a53psci &5dO _l@~@   cpu@100cpuarm,cortex-a72psci  &5O _l@~@thermal-idle&'cpu@101cpuarm,cortex-a72psci  &5O _l@~@thermal-idle&'l2-cache-cluster0cache an@ l2-cache-cluster1cache an@idle-states%pscicpu-sleeparm,idle-state2CZxk cluster-sleeparm,idle-state2CZk display-subsystemrockchip,display-subsystem|memory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ * Gaclkaclk-perfhclkpm01234syslegacyclientD`Wet |,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclk disabledinterrupt-controller pcie-ep@f8000000rockchip,rk3399-pcie-ep apb-basemem-base Gaclkaclk-perfhclkpm8(coremgmtmgmt-stickypipepmpclkaclk |,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 default disabledethernet@fe300000rockchip,rk3399-gmac0 4macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmaceth# disabledmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@.р Mbiuciuciu-driveciu-sample<yresetokayGQbozdefault  mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@A.р  Lbiuciuciu-driveciu-sample<zresetokayGQ !odefault"#$%&'mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 N Nclk_xinclk_ahbemmc_cardclock|( phy_arasanokayG%usb@fe380000 generic-ehci8)|*usb disabledusb@fe3a0000 generic-ohci:)|*usb disabledusb@fe3c0000 generic-ehci<+|,usb disabledusb@fe3e0000 generic-ohci> +|,usb disableddebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otg disabledusb@fe800000 snps,dwc3irefbus_earlysuspend4otg|-.usb2-phyusb3-phy Pesaradcapb_pclk saradc-apbokay05crypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;default6+ disabledi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#default7+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"default8+okay<Stouchscreen@14goodix,gt1158 9  k9  u9 ::i2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&default;+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%default<+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$default=+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkcdefault >?@okaybluetoothbrcm,bcm4345c5Alpo B !`default CDE ! (&4Fserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbdefaultG disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkddefaultHokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkedefaultI disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDAJ J FtxrxdefaultKLMN+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5AJ J FtxrxdefaultOPQR+okayflash@0jedec,spi-norPspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4AJJFtxrxdefaultSTUV+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCAJJFtxrxdefaultWXYZ+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkA[[ Ftxrxdefault\]^_+ disabledthermal-zonescpu-thermalbdx`tripscpu_alert0Epassiveacpu_alert1 Epassivebcpu_crits Ecriticalcooling-mapsmap0amap1bHgpu-thermalbdx`tripsgpu_alert0$Epassivecgpu_crits Ecriticalcooling-mapsmap0c dtsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk tsadc-apbsinitdefaultsleepefeokay`qos@ffa58000rockchip,rk3399-qossyscon nqos@ffa5c000rockchip,rk3399-qossyscon oqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon rqos@ffa70080rockchip,rk3399-qossyscon sqos@ffa74000rockchip,rk3399-qossyscon@ pqos@ffa76000rockchip,rk3399-qossyscon` qqos@ffa90000rockchip,rk3399-qossyscon tqos@ffa98000rockchip,rk3399-qossyscon gqos@ffaa0000rockchip,rk3399-qossyscon uqos@ffaa0080rockchip,rk3399-qossyscon vqos@ffaa8000rockchip,rk3399-qossyscon wqos@ffaa8080rockchip,rk3399-qossyscon xqos@ffab0000rockchip,rk3399-qossyscon hqos@ffab0080rockchip,rk3399-qossyscon iqos@ffab8000rockchip,rk3399-qossyscon jqos@ffac0000rockchip,rk3399-qossyscon kqos@ffac0080rockchip,rk3399-qossyscon lqos@ffac8000rockchip,rk3399-qossyscon yqos@ffac8080rockchip,rk3399-qossyscon zqos@ffad0000rockchip,rk3399-qossyscon {qos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon mpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller4+power-domain@34"Hg4power-domain@33!Hhi4power-domain@31Hj4power-domain@32  Hkl4power-domain@35#Hm4power-domain@25l4power-domain@23Hn4power-domain@22fHo4power-domain@27LHp4power-domain@28Hq4power-domain@8~}4power-domain@9 4power-domain@24Hrs4power-domain@154+power-domain@21rHt4power-domain@19Huv4power-domain@20Hwx4power-domain@164+power-domain@17Hyz4power-domain@18H{4syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2io-domains&rockchip,rk3399-pmu-io-voltage-domainokayOFspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5||spiclkapb_pclk<default}~+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7||"baudclkapb_pclkfdefault disabledi2c@ff3c0000rockchip,rk3399-i2c<|  | | i2cpclk9default+okay<Spmic@1crockchip,rk818 xin32krk808-clkout2default^&&AregulatorsDCDC_REG1 vdd_cpu_l  " Y : Rq regulator-state-mem gDCDC_REG2 vdd_center  " 5 :B@ Rqregulator-state-mem gDCDC_REG3vcc_ddr regulator-state-mem DCDC_REG4vcc_1v8  "w@ :w@Fregulator-state-mem LDO_REG1vcca3v0_codec "- :-LDO_REG2 vcc3v0_touch "- :-:LDO_REG3vcca1v8_codec "w@ :w@LDO_REG4 rk818_pwr_on  "2Z :2Zregulator-state-mem LDO_REG5vcc_3v0  "- :-regulator-state-mem LDO_REG6vcc_1v5  "` :`regulator-state-mem LDO_REG7 vcc1v8_dvp "w@ :w@LDO_REG8 vcc3v3_s3  "2Z :2Zregulator-state-mem gLDO_REG9 vccio_sd "w@ :2Z'SWITCH_REG vcc3v3_s0 regulator-state-mem regulator@40silergy,syr827@ default vdd_cpu_b " Y :0 R regulator-state-mem gregulator@41silergy,syr828A defaultvdd_gpu " Y : R regulator-state-mem gi2c@ff3d0000rockchip,rk3399-i2c=|  | | i2cpclk8default+okay<XSmpu6500@68invensense,mpu6500h 4Fi2c@ff3e0000rockchip,rk3399-i2c>|  | | i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB default|okaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB default| disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  default| disabledpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 default| disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_monvideo-codec@ff650000rockchip,rk3399-vpue rq 4vepuvdpu aclkhclk iommu@ff650800rockchip,iommue@s aclkiface video-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore  iommu@ff660480rockchip,iommu f@f@u aclkiface  iommu@ff670800rockchip,iommug@* aclkiface  disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@    apb_pclk[dma-controller@ff6e0000arm,pl330arm,primecelln@    apb_pclkJclock-controller@ff750000rockchip,rk3399-pmucruuxin24m |(J|clock-controller@ff760000rockchip,rk3399-cruvxin24m @BCxD#g/;рxh<4`#Fׄׄ ׄsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domainokay   ' *mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf : disabledusb2phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480m disabled)host-port : 4linestate disabled*otg-port :0ghj4otg-bvalidotg-idlinestate disabled-usb2phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480m disabled+host-port : 4linestate disabled,otg-port :0lmo4otg-bvalidotg-idlinestate disabled/phy@f780rockchip,rk3399-emmc-phy$emmcclk E2 :okay(pcie-phyrockchip,rk3399-pcie-phyrefclk :phy disabledphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~Luphyuphy-pipeuphy-tcphy disableddp-port :1usb3-port :.phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref Muphyuphy-pipeuphy-tcphy disableddp-port :2usb3-port :0watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBA[Ftx mclkhclkUdefault disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'A[[Ftxrxi2s_clki2s_hclkVbclk_onbclk_off disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(A[[Ftxrxi2s_clki2s_hclkWdefault disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)A[[Ftxrxi2s_clki2s_hclkX disabledvop@ff8f0000rockchip,rk3399-vop-lit w ׄaclk_vopdclk_vophclk_vop  axiahbdclkokay Yport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@44iommu@ff8f3f00rockchip,iommu?w aclkiface okayvop@ff900000rockchip,rk3399-vop-big v ׄaclk_vopdclk_vophclk_vop  axiahbdclkokay Yport+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@43iommu@ff903f00rockchip,iommu?v aclkiface okayisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk |dphy disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface  pisp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk |dphy disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface  phdmi-soundsimple-audio-card i2s  hdmi-sound disabledsimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqpoiahbisfrcecgrfref disabledports+port@0+endpoint@0endpoint@1port@1dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfapb+okay ports+port@0+endpoint@0endpoint@1port@1+endpointpanel@0hannstar,hsd060bhw4  u  defaultportendpointdsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfapb+ : disabledports+port@0+endpoint@0endpoint@1port@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefaultdp disabledports+port@0+endpoint@0endpoint@1port@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 4jobmmugpu&5 P#okay dpinctrlrockchip,rk3399-pinctrl+gpio@ff720000rockchip,gpio-bankr|  * !gpio@ff730000rockchip,gpio-banks|  * gpio@ff780000rockchip,gpio-bankxP  * Bgpio@ff788000rockchip,gpio-bankxQ  * 9gpio@ff790000rockchip,gpio-bankyR  * pcfg-pull-up 6pcfg-pull-down Cpcfg-pull-none Rpcfg-pull-none-12ma R _ pcfg-pull-none-13ma R _ pcfg-pull-none-18ma R _pcfg-pull-none-20ma R _pcfg-pull-up-2ma 6 _pcfg-pull-up-8ma 6 _pcfg-pull-up-18ma 6 _pcfg-pull-up-20ma 6 _pcfg-pull-down-4ma C _pcfg-pull-down-8ma C _pcfg-pull-down-12ma C _ pcfg-pull-down-18ma C _pcfg-pull-down-20ma C _pcfg-output-high npcfg-output-low zpcfg-input-enable pcfg-input-pull-up  6pcfg-input-pull-down  Cclockclk-32k cifcif-clkin  cif-clkouta  edpedp-hpd gmacrgmii-pins     rmii-pins      i2c0i2c0-xfer i2c1i2c1-xfer 6i2c2i2c2-xfer 7i2c3i2c3-xfer 8i2c4i2c4-xfer   i2c5i2c5-xfer   ;i2c6i2c6-xfer   <i2c7i2c7-xfer =i2c8i2c8-xfer i2s0i2s0-2ch-bus` i2s0-2ch-bus-bclk-off` i2s0-8ch-bus i2s0-8ch-bus-bclk-off i2s1i2s1-2ch-busP i2s1-2ch-bus-bclk-offP sdio0sdio0-bus1 sdio0-bus4@ sdio0-cmd sdio0-clk  sdio0-cd sdio0-pwr sdio0-bkpwr sdio0-wp sdio0-int sdmmcsdmmc-bus1 sdmmc-bus4@    %sdmmc-clk  "sdmmc-cmd  #sdmmc-cd $sdmmc-wp suspendap-pwroff ddrio-pwroff spdifspdif-bus spdif-bus-1 spi0spi0-clk Kspi0-cs0 Nspi0-cs1 spi0-tx Lspi0-rx Mspi1spi1-clk  Ospi1-cs0  Rspi1-rx Qspi1-tx Pspi2spi2-clk  Sspi2-cs0  Vspi2-rx  Uspi2-tx  Tspi3spi3-clk }spi3-cs0 spi3-rx spi3-tx ~spi4spi4-clk Wspi4-cs0 Zspi4-rx Yspi4-tx Xspi5spi5-clk \spi5-cs0 _spi5-rx ^spi5-tx ]testclktest-clkout0 test-clkout1 test-clkout2 tsadcotp-pin eotp-out fuart0uart0-xfer >uart0-cts ?uart0-rts @uart1uart1-xfer   Guart2auart2a-xfer  uart2buart2b-xfer uart2cuart2c-xfer Huart3uart3-xfer Iuart3-cts uart3-rts uart4uart4-xfer uarthdcpuarthdcp-xfer pwm0pwm0-pin pwm0-pin-pull-down vop0-pwm-pin vop1-pwm-pin pwm1pwm1-pin pwm1-pin-pull-down pwm2pwm2-pin pwm2-pin-pull-down pwm3apwm3a-pin pwm3bpwm3b-pin hdmihdmi-i2c-xfer hdmi-cec pciepci-clkreqn-cpm pci-clkreqnb-cpm buttonspwrbtn-pin ledsred-led-pin green-led-pin blue-led-pin pmicpmic-int-l vsel1-pin vsel2-pin sdio-pwrseqwifi-enable-h-pin soundvcc1v8-codec-en wireless-bluetoothbt-wake-pin Dbt-host-wake-pin Cbt-reset-pin Eopp-table-0operating-points-v2  opp00 Q  @opp01 #F opp02 0, P Popp03 < HHopp04 G B@B@ disabledopp05 Tfr ** disabledopp-table-1operating-points-v2 opp00 Q  @opp01 #F opp02 0, opp03 < Y Yopp04 G ~~opp05 Tfr opp06 Yh/ 0opp07 kI OO disabledopp-table-2operating-points-v2opp00  0opp01 @ 0opp02 ׄ 0opp03 e Y Y0opp04 #F HH0opp05 / 0chosen serial2:115200n8adc-keys adc-keys  buttons j dbutton-up "Volume Up (s 3button-down "Volume Down (r 3 'backlightpwm-backlight MPgpio-keys gpio-keysdefaultkey-power R ! "Power (tleds gpio-ledsdefault led-0 d led-1 d led-2 d multi-ledleds-group-multicolor d  jindicator svcc-sys-regulatorregulator-fixedvcc_sys vcc3v3-sys-regulatorregulator-fixed vcc3v3_sys  "2Z :2Z x&vcc1v8-s3-regulatorregulator-fixed vcca1v8_s3 "w@ :w@ x& 5vcc1v8-codec-regulatorregulator-fixed  9default vcc1v8_codec "w@ :w@ x&sdio-wifi-pwrseqmmc-pwrseq-simpleA ext_clockdefault n ' u! vcc1v8-lcdregulator-fixed  vcc1v8_lcd "w@ :w@ x& 9defaultvcc2v8-lcdregulator-fixed  vcc2v8_lcd "* :* x& 9defaultvibratorgpio-vibrator 9  & compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typegpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqdisable-wpkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clocksassigned-clock-ratescd-gpiosvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsirq-gpiosreset-gpiosAVDD28-supplyVDDIO-supplytouchscreen-size-xtouchscreen-size-yreg-shiftreg-io-widthuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosmax-speedshutdown-gpiosvbat-supplyvddio-supplydmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendfcs,suspend-voltage-selector#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmassigned-clock-parentsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiclock-masterbacklightvcc-supplyiovcc-supplymali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltpwmsdebounce-intervalcolorfunctionledsvin-supplyenable-active-highgpiopost-power-on-delay-mspower-off-delay-usenable-gpios