%8(  &,firefly,rk3566-roc-pcrockchip,rk35667Firefly Station M2aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe010000/mmc@fe2b0000/mmc@fe310000/mmc@fe2c0000cpus cpu@0cpu,arm,cortex-a55 psci*>K@]jw@ cpu@100cpu,arm,cortex-a55 psci*>K@]jw@ cpu@200cpu,arm,cortex-a55 psci*>K@]jw@ cpu@300cpu,arm,cortex-a55 psci*>K@]jw@ l3-cache,cache@M@_opp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc" protocol@14(opp-table-1,operating-points-v2Copp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-card5HDMILi2seokaysimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0#smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m(xin32k ,fixed-clockxin32kdefault(sram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _ sata-phy"4 disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ` sata-phy"4 disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkBotg Jutmi_wide4SZokay usb2-phys zhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkBhost usb2-phyusb3-phy Jutmi_wide4SZokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  A(usb@fd800000 ,generic-ehci usbokayusb@fd840000 ,generic-ohci usbokayusb@fd880000 ,generic-ehci usb disabledusb@fd8c0000 ,generic-ohci usb disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd]io-domains&,rockchip,rk3568-pmu-io-voltage-domainokay &4Bsyscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru(Pclock-controller@fdd20000,rockchip,rk3568-cruxin24m(P] mG i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk default okayregulator@1c ,tcs,tcs4525vdd_cpu 50+=!regulator-state-memHpmic@20,rockchip,rk809 "rk808-clkout1rk808-clkout2]HmclkHdefault#$a(%%%%%%%%%codec regulatorsDCDC_REG1vdd_log+ pqregulator-state-mem*B DCDC_REG2vdd_gpu pqDregulator-state-memHB DCDC_REG3vcc_ddr+^regulator-state-mem*DCDC_REG4vdd_npu p^regulator-state-memHDCDC_REG5vcc_1v8+w@w@regulator-state-mem*Bw@LDO_REG1vdda0v9_image+  Yregulator-state-mem*B LDO_REG2 vdda_0v9+  regulator-state-mem*B LDO_REG3 vdda0v9_pmu+  regulator-state-mem*B LDO_REG4 vccio_acodec+2Z2Zregulator-state-mem*B2ZLDO_REG5 vccio_sd+w@2Zregulator-state-mem*B2ZLDO_REG6 vcc3v3_pmu+2Z2Zregulator-state-mem*B2ZLDO_REG7 vcca_1v8+w@w@regulator-state-mem*Bw@LDO_REG8 vcca1v8_pmu+w@w@hregulator-state-mem*Bw@LDO_REG9vcca1v8_image+w@w@Zregulator-state-mem*Bw@SWITCH_REG1+vcc3v3SWITCH_REG2 vcc3v3_sd+fserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclku&&'defaultzokaypwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(default disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk)default disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*default disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk+default disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller power-domain@7,power-domain@8 -./power-domain@9  012power-domain@10 345678power-domain@11 9power-domain@13 :power-domain@14 ;<=power-domain@15>?@ABgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpugpubus *C4okayDvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu aclkhclkE4 iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface4 Erga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ZaclkhclksclkS&$% coreaxiahb4 video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclkF4 iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface4 Fmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleрSreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refS stmmaceth G-H@ISokay]J\inputirgmiirdefaultKLMNOP }" N O$Qmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22Qstmmac-axi-configGrx-queues-configHqueue0tx-queues-configIqueue0vop@fe040000 0@+vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2R4 okay,rockchip,rk3566-vop]ports port@0 endpoint@25S[port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface4 okayRdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DpclkdphyT4 apbS disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EpclkdphyU4 apbS disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefdefault VWX4 zokayEYUZports port@0endpoint5[Sport@1endpoint5\qos@fe128000,rockchip,rk3568-qossyscon ,qos@fe138080,rockchip,rk3568-qossyscon ;qos@fe138100,rockchip,rk3568-qossyscon <qos@fe138180,rockchip,rk3568-qossyscon =qos@fe148000,rockchip,rk3568-qossyscon -qos@fe148080,rockchip,rk3568-qossyscon .qos@fe148100,rockchip,rk3568-qossyscon /qos@fe150000,rockchip,rk3568-qossyscon 9qos@fe158000,rockchip,rk3568-qossyscon 3qos@fe158100,rockchip,rk3568-qossyscon 4qos@fe158180,rockchip,rk3568-qossyscon 5qos@fe158200,rockchip,rk3568-qossyscon 6qos@fe158280,rockchip,rk3568-qossyscon 7qos@fe158300,rockchip,rk3568-qossyscon 8qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon >qos@fe190280,rockchip,rk3568-qossyscon ?qos@fe190300,rockchip,rk3568-qossyscon @qos@fe190380,rockchip,rk3568-qossyscon Aqos@fe190400,rockchip,rk3568-qossyscon Bqos@fe198000,rockchip,rk3568-qossyscon :qos@fe1a8000,rockchip,rk3568-qossyscon 0qos@fe1a8080,rockchip,rk3568-qossyscon 1qos@fe1a8100,rockchip,rk3568-qossyscon 2dfi@fe230000,rockchip,rk3568-dfi#  e]pcie@fe260000,rockchip,rk3568-pcie0@&+dbiapbconfig<KJIHGsyspmcmsglegacyerrr($aclk_mstaclk_slvaclk_dbipclkauxpci|`^^^^ pcie-phy4T @@Spipe okaydefault_ ` alegacy-interrupt-controller H^mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleрSresetokay   $" -defaultbcde 8 Ff Rmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleрSresetokay   _ l g F% Rhdefault ijkspi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfcldefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 ]{}m n6(|zy{}corebusaxiblocktimerokay    F Ri2s@fe400000,rockchip,rk3568-i2s-tdm@ 4]=AmFqFq?C9mclk_txmclk_rxhclkum txSPQ tx-mrx-mokay i2s@fe410000,rockchip,rk3568-i2s-tdmA 5]EImFqFqGK:mclk_txmclk_rxhclkumm rxtxSRS tx-mrx-mdefaultnopqrsokay i2s@fe420000,rockchip,rk3568-i2s-tdmB 6]MmFqOO;mclk_txmclk_rxhclkumm txrxSTtx-mdefaulttuvw disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclkumm txrxSUV tx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclkum  rxxyz{|}defaultSXpdm-m disabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\um txdefault~ disableddma-controller@fe530000,arm,pl330arm,primecellS@    apb_pclk &dma-controller@fe550000,arm,pl330arm,primecellU@   apb_pclk mi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclkdefault okayi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclkdefault okayi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclkdefault okayi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclkdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclkdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclku&& txrxdefault   disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclku&& txrxdefault   disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclku&& txrxdefault   disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclku&& txrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclku&&defaultzokay bluetooth,brcm,bcm43438-btlpo   'default  6% Bhserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclku&&defaultzokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclku&&defaultz disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclku&& defaultz disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclku& & defaultz disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclku& & defaultz disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclku&&defaultz disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclku&&defaultz disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclku&&defaultz disabledthermal-zonescpu-thermal Od e stripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 0 gpu-thermal O e stripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq s]mf@ `tsadcapb_pclkS sdefaultsleep  okaysaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclkS saradc-apb  disabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe]"mS   okayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe]%mS   okayphy@fe870000,rockchip,rk3568-csi-dphyypclk Sapb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz 4 apbS disabledTmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ 4 apbS disabledUusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m  *(okayhost-port okayrotg-port okayrusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m  *(okayhost-port  disabledotg-port okayrpinctrl,rockchip,rk3568-pinctrle] gpio@fdd60000,rockchip,gpio-bank !.  : J  V"gpio@fe740000,rockchip,gpio-bankt "cd : J  V`gpio@fe750000,rockchip,gpio-banku #ef : J@  Vgpio@fe760000,rockchip,gpio-bankv $gh : J`  Vgpio@fe770000,rockchip,gpio-bankw %ij : J  Vpcfg-pull-up bpcfg-pull-down opcfg-pull-none ~pcfg-pull-none-drv-level-1 ~ pcfg-pull-none-drv-level-2 ~ pcfg-pull-none-drv-level-3 ~ pcfg-pull-up-drv-level-1 b pcfg-pull-up-drv-level-2 b pcfg-pull-none-smt ~ acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 cpuebcedpdpemmceth0eth1flashfspifspi-pins` lgmac0gmac1gmac1m0-miim Kgmac1m0-clkinout Ogmac1m0-rx-bus20    Mgmac1m0-tx-bus20  Lgmac1m0-rgmii-clk Ngmac1m0-rgmii-bus@ Pgpuhdmitxhdmitxm0-cec Xhdmitx-scl Vhdmitx-sda Wi2c0i2c0-xfer   i2c1i2c1-xfer  i2c2i2c2m0-xfer i2c3i2c3m0-xfer i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2s1i2s1m0-lrckrx qi2s1m0-lrcktx pi2s1m0-mclk $i2s1m0-sclkrx oi2s1m0-sclktx ni2s1m0-sdi0  ri2s1m0-sdo0 si2s2i2s2m0-lrcktx ui2s2m0-sclktx ti2s2m0-sdi vi2s2m0-sdo wi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk xpdmm0-clk1 ypdmm0-sdi0  zpdmm0-sdi1  {pdmm0-sdi2  |pdmm0-sdi3 }pmicpmic_int #pmupwm0pwm0m0-pins (pwm1pwm1m0-pins )pwm2pwm2m0-pins *pwm3pwm3-pins +pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ bsdmmc0-clk csdmmc0-cmd dsdmmc0-det esdmmc1sdmmc1-bus4@ isdmmc1-clk ksdmmc1-cmd jsdmmc2spdifspdifm0-tx ~spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer 'uart1uart1m0-xfer   uart1m0-ctsn uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h bt-host-wake-l bt-wake-l ledsuser-led-enable-h pciepcie-enable-h pcie-reset-h  _sdio-pwrseqwifi-enable-h  usbvcc5v0-usb30-host-en_h vcc5v0-usb-otg-en_h chosen serial2:1500000n8external-gmac1-clock ,fixed-clocksY@ gmac1_clkin(Jhdmi-con,hdmi-connectoraportendpoint5\leds ,gpio-ledsled-user user-led on " heartbeatdefault rk809-sound,simple-audio-cardLi2s5STATION-M2-FRONTeokaysimple-audio-card,cpusimple-audio-card,codecsdio-pwrseqokay,mmc-pwrseq-simple ext_clockdefault  gusb-5v-regulator,regulator-fixedusb_5v+LK@LK@vcc5v0-sys-regulator,regulator-fixed vcc5v0_sys+LK@LK@=!vcc3v3-pcie-regulator,regulator-fixed  "default vcc3v3_pcie2Z2Z=!avcc3v3-sys-regulator,regulator-fixed vcc3v3_sys2Z2Z=!%vcc5v0-usb30-host-regulator,regulator-fixedvcc5v0_usb30_host  "defaultLK@LK@=!vcc5v0-usb-otg-regulator,regulator-fixedvcc5v0_usb_otg  "defaultLK@LK@=! interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-source#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyrockchip,mic-in-differentialregulator-on-in-suspendregulator-suspend-microvoltregulator-initial-modedmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplybus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqmmc-hs200-1_8vnon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cells#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathlabeldefault-statelinux,default-triggerretain-state-suspendedenable-active-high