m8ް( x %,embedfire,lubancat-2rockchip,rk35687EmbedFire LubanCat 2aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/ethernet@fe010000/mmc@fe2b0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55 !psci/CP@bo|@ cpu@100cpu,arm,cortex-a55!psci/CP@bo|@ cpu@200cpu,arm,cortex-a55!psci/CP@bo|@ cpu@300cpu,arm,cortex-a55!psci/CP@bo|@ l3-cache,cacheER@dopp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0 opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0opp-1992000000v 000display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc' protocol@14-opp-table-1,operating-points-v2Eopp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-card:HDMIQi2sjokaysimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0(smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m-xin32k ,fixed-clockxin32kdefault-sram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@  satapmaliverxoob _ sata-phy'9 disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci  satapmaliverxoob ` sata-phy'9 disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@   ref_clksuspend_clkbus_clkGhost Outmi_wide9X_okay usb2-phyx high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@   ref_clksuspend_clkbus_clkGhost usb2-phyusb3-phy Outmi_wide9X_okayinterrupt-controller@fd400000 ,arm,gic-v3 @F  A^!usb@fd800000 ,generic-ehci  usbokayusb@fd840000 ,generic-ohci  usbokayusb@fd880000 ,generic-ehci  usbokayusb@fd8c0000 ,generic-ohci  usbokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd^io-domains&,rockchip,rk3568-pmu-io-voltage-domainokay+syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru-9clock-controller@fdd20000,rockchip,rk3568-cru  xin24m-9F VG ki2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c . -  i2cpclk default okayregulator@1c ,tcs,tcs4525vdd_cpu 50&!regulator-state-mem1pmic@20,rockchip,rk809 "FHk- mclk Hdefault#Jk|$$$$$$$$$regulatorsDCDC_REG1 vdd_logic pqregulator-state-mem1DCDC_REG2vdd_gpu pqFregulator-state-mem1DCDC_REG3vcc_ddrregulator-state-mem DCDC_REG4vdd_npu pqregulator-state-mem1DCDC_REG5vcc_1v8w@w@regulator-state-mem1LDO_REG1vdda0v9_image  Zregulator-state-mem1LDO_REG2 vdda_0v9  regulator-state-mem1LDO_REG3 vdda0v9_pmu  regulator-state-mem % LDO_REG4 vccio_acodec2Z2Zregulator-state-mem1LDO_REG5 vccio_sdw@2Zregulator-state-mem1LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem %2ZLDO_REG7 vcca_1v8w@w@regulator-state-mem1LDO_REG8 vcca1v8_pmuw@w@regulator-state-mem %w@LDO_REG9vcca1v8_imagew@w@[regulator-state-mem1SWITCH_REG1vcc_3v3regulator-state-mem1SWITCH_REG2 vcc3v3_sdaregulator-state-mem1serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t  , baudclkapb_pclkA%%&defaultFS disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0  pwmpclk'default] disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0  pwmpclk(default] disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm   0  pwmpclk)default] disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0  0  pwmpclk*default] disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllerh power-domain@7 |+hpower-domain@8  |,-.hpower-domain@9   |/01hpower-domain@10  |234567hpower-domain@11  |8hpower-domain@13  |9hpower-domain@14  |:;<hpower-domain@15  |=>?@ABCDhgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpu  gpubus/E9okayFvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu   aclkhclkG9 iommu@fdea0800,rockchip,rk3568-iommu@   aclkiface 9 Grga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga Z  aclkhclksclkX&$% coreaxiahb9 video-codec@fdee0000,rockchip,rk3568-vepu @   aclkhclkH9 iommu@fdee0800,rockchip,rk3568-iommu@ ?   aclkiface9 Hmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d   biuciuciu-driveciu-sampleрXreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@ W stmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refX stmmacethIJ Kokay(rgmii1output >LN dN FkdefaultMNOPQy!Rmdio,snps,dwmac-mdio phy@0,ethernet-phy-ieee802.3-c22Rstmmac-axi-configIrx-queues-configJqueue0tx-queues-configKqueue0vop@fe040000 0@vopgamma-lut ( % aclkhclkdclk_vp0dclk_vp1dclk_vp2S9 okay,rockchip,rk3568-vopFkports port@0 endpoint@2T\port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?    aclkiface9 okaySdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi D pclk dphyU9 apbX disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi E pclk dphyV9 apbX disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -( ( iahbisfrcecrefdefault WXY9 FkokayZ[ports port@0endpoint\Tport@1endpoint]qos@fe128000,rockchip,rk3568-qossyscon +qos@fe138080,rockchip,rk3568-qossyscon :qos@fe138100,rockchip,rk3568-qossyscon ;qos@fe138180,rockchip,rk3568-qossyscon <qos@fe148000,rockchip,rk3568-qossyscon ,qos@fe148080,rockchip,rk3568-qossyscon -qos@fe148100,rockchip,rk3568-qossyscon .qos@fe150000,rockchip,rk3568-qossyscon 8qos@fe158000,rockchip,rk3568-qossyscon 2qos@fe158100,rockchip,rk3568-qossyscon 3qos@fe158180,rockchip,rk3568-qossyscon 4qos@fe158200,rockchip,rk3568-qossyscon 5qos@fe158280,rockchip,rk3568-qossyscon 6qos@fe158300,rockchip,rk3568-qossyscon 7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon =qos@fe190280,rockchip,rk3568-qossyscon Aqos@fe190300,rockchip,rk3568-qossyscon Bqos@fe190380,rockchip,rk3568-qossyscon Cqos@fe190400,rockchip,rk3568-qossyscon Dqos@fe198000,rockchip,rk3568-qossyscon 9qos@fe1a8000,rockchip,rk3568-qossyscon /qos@fe1a8080,rockchip,rk3568-qossyscon 0qos@fe1a8100,rockchip,rk3568-qossyscon 1dfi@fe230000,rockchip,rk3568-dfi#  &^pcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHGsyspmcmsglegacyerr3( $ aclk_mstaclk_slvaclk_dbipclkauxpci=`P____^o~ pcie-phy9T @@Xpipe okay L`legacy-interrupt-controller H_mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b   biuciuciu-driveciu-sampleрXresetokay   a +defaultbcdemmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c   biuciuciu-driveciu-sampleрXreset disabledspi@fe300000 ,rockchip,sfc0@ e xv clk_sfchclk_sfcfdefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 F{}| V n6 ( |zy{} corebusaxiblocktimerokay  8 Gdefault ghi Ui2s@fe400000,rockchip,rk3568-i2s-tdm@ 4F=AVFqFq ?C9 mclk_txmclk_rxhclkAj ctxXPQ tx-mrx-mk disabled i2s@fe410000,rockchip,rk3568-i2s-tdmA 5FEIVFqFq GK: mclk_txmclk_rxhclkAjj crxtxXRS tx-mrx-mdefault0klmnopqrstuvkokay mi2s@fe420000,rockchip,rk3568-i2s-tdmB 6FMVFq OO; mclk_txmclk_rxhclkAjj ctxrxXTtx-mdefaultwxyzk disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7 SW< mclk_txmclk_rxhclkAjj ctxrxXUV tx-mrx-mk disabledpdm@fe440000,rockchip,rk3568-pdmD L ZY pdm_clkpdm_hclkAj  crx{|}~defaultXXpdm-mk disabledspdif@fe460000,rockchip,rk3568-spdifF f  mclkhclk _\Aj ctxdefaultk disableddma-controller@fe530000,arm,pl330arm,primecellS@      apb_pclk %dma-controller@fe550000,arm,pl330arm,primecellU@     apb_pclk ji2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ / HG  i2cpclkdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0 JI  i2cpclkdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1 LK  i2cpclkdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2 NM  i2cpclkdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3 PO  i2cpclkdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`    tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia g RQ spiclkapb_pclkA%% ctxrxdefault   disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib h TS spiclkapb_pclkA%% ctxrxdefault   disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic i VU spiclkapb_pclkA%% ctxrxdefault   disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid j XW spiclkapb_pclkA%% ctxrxdefault  disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte u  baudclkapb_pclkA%%defaultFS disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v #  baudclkapb_pclkA%%defaultFSokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w '$ baudclkapb_pclkA%%defaultFS disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x +( baudclkapb_pclkA%% defaultFS disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y /, baudclkapb_pclkA% % defaultFS disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z 30 baudclkapb_pclkA% % defaultFS disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk { 74 baudclkapb_pclkA%%defaultFS disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl | ;8 baudclkapb_pclkA%%defaultFS disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm } ?< baudclkapb_pclkA%%defaultFS disabledthermal-zonescpu-thermal d  tripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 0 gpu-thermal   tripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0  tsadc@fe710000,rockchip,rk3568-tsadcq sFVf@ `  tsadcapb_pclkX sdefaultsleep  *okay @ Wsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]  saradcapb_pclkX saradc-apb rokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY  pwmpclkdefault] disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY  pwmpclkdefault] disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  ZY  pwmpclkdefault] disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 ZY  pwmpclkdefault] disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\  pwmpclkdefault]okaypwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\  pwmpclkdefault] disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ]\  pwmpclkdefault] disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ]\  pwmpclkdefault] disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_  pwmpclkdefault] disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_  pwmpclkdefault] disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  `_  pwmpclkdefault] disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 `_  pwmpclkdefault] disabledphy@fe830000,rockchip,rk3568-naneng-combphy "}  refapbpipeF"VX   okayphy@fe840000,rockchip,rk3568-naneng-combphy %~  refapbpipeF%VX   okayphy@fe870000,rockchip,rk3568-csi-dphy y pclk Xapb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy  refpclk z 9 apbX disabledUmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy  refpclk { 9 apbX disabledVusb2phy@fe8a0000,rockchip,rk3568-usb2phy  phyclkclk_usbphy0_480m  -okayhost-port okay otg-port okay usb2phy@fe8b0000,rockchip,rk3568-usb2phy  phyclkclk_usbphy1_480m  -okayhost-port okayotg-port okay pinctrl,rockchip,rk3568-pinctrl&^ gpio@fdd60000,rockchip,gpio-bank ! .    "gpio@fe740000,rockchip,gpio-bankt " cd   gpio@fe750000,rockchip,gpio-banku # ef  @  gpio@fe760000,rockchip,gpio-bankv $ gh  `  Lgpio@fe770000,rockchip,gpio-bankw % ij   pcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  /acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 Dcpuebcedpdpemmcemmc-bus8 D  gemmc-clk Dhemmc-cmd Dieth0eth1flashfspifspi-pins` Dfgmac0gmac0-miim Dgmac0-rx-bus20 Dgmac0-tx-bus20 D   gmac0-rgmii-clk Dgmac0-rgmii-bus@ Dgmac1gmac1m1-miim DMgmac1m1-rx-bus20 D Ogmac1m1-tx-bus20 DNgmac1m1-rgmii-clk DPgmac1m1-rgmii-bus@ DQgpuhdmitxhdmitxm0-cec DYhdmitx-scl DWhdmitx-sda DXi2c0i2c0-xfer D   i2c1i2c1-xfer D  i2c2i2c2m0-xfer D i2c3i2c3m0-xfer Di2c4i2c4m0-xfer D  i2c5i2c5m0-xfer D  i2s1i2s1m0-lrckrx Dni2s1m0-lrcktx Dmi2s1m0-sclkrx Dli2s1m0-sclktx Dki2s1m0-sdi0 D oi2s1m0-sdi1 D pi2s1m0-sdi2 D qi2s1m0-sdi3 Dri2s1m0-sdo0 Dsi2s1m0-sdo1 Dti2s1m0-sdo2 D ui2s1m0-sdo3 D vi2s2i2s2m0-lrcktx Dxi2s2m0-sclktx Dwi2s2m0-sdi Dyi2s2m0-sdo Dzi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk D{pdmm0-clk1 D|pdmm0-sdi0 D }pdmm0-sdi1 D ~pdmm0-sdi2 D pdmm0-sdi3 Dpmicpmic-int D#pmupwm0pwm0m0-pins D'pwm1pwm1m0-pins D(pwm2pwm2m0-pins D)pwm3pwm3-pins D*pwm4pwm4-pins Dpwm5pwm5-pins Dpwm6pwm6-pins Dpwm7pwm7-pins Dpwm8pwm8m0-pins D pwm9pwm9m0-pins D pwm10pwm10m0-pins D pwm11pwm11m0-pins Dpwm12pwm12m0-pins Dpwm13pwm13m0-pins Dpwm14pwm14m0-pins Dpwm15pwm15m0-pins Drefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ Dbsdmmc0-clk Dcsdmmc0-cmd Ddsdmmc0-det Desdmmc1sdmmc2spdifspdifm0-tx Dspi0spi0m0-pins0 D spi0m0-cs0 Dspi0m0-cs1 Dspi1spi1m0-pins0 D spi1m0-cs0 Dspi1m0-cs1 Dspi2spi2m0-pins0 Dspi2m0-cs0 Dspi2m0-cs1 Dspi3spi3m1-pins0 Dtsadctsadc-shutorg Dtsadc-pin Duart0uart0-xfer D&uart1uart1m0-xfer D  uart2uart2m0-xfer Duart3uart3m1-xfer Duart4uart4m0-xfer Duart5uart5m0-xfer Duart6uart6m0-xfer Duart7uart7m0-xfer Duart8uart8m0-xfer Duart9uart9m0-xfer Dvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2ledsuser-status-led-pin Dusbvcc5v0-usb20-host-en Dvcc5v0-usb30-host-en Dvcc5v0-otg-vbus-en Dpcievcc3v3-m2-pcie-en Dvcc3v3-mini-pcie-en Dsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci  satapmaliverxoob ^ sata-phy'9okaysyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon >qos@fe190100,rockchip,rk3568-qossyscon ?qos@fe190200,rockchip,rk3568-qossyscon @syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy  &'w refclk_mrefclk_npclkXphy Rokaypcie@fe270000,rockchip,rk3568-pcie 3( $ aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr=`P^o~ pcie-phy90@@'T @@@dbiapbconfigXpipe disabledlegacy-interrupt-controller pcie@fe280000,rockchip,rk3568-pcie 3( $ aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr=`P^o~  pcie-phy90@(T @@dbiapbconfigXpipeokay legacy-interrupt-controller ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*macirqeth_wake_irq@ W stmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refX stmmaceth okay(rgmii1output >N dN Fkdefaulty"mdio,snps,dwmac-mdio phy@0,ethernet-phy-ieee802.3-c22stmmac-axi-configrx-queues-configqueue0tx-queues-configqueue0phy@fe820000,rockchip,rk3568-naneng-combphy |  refapbpipeFVX   okaychosen cserial2:1500000n8leds ,gpio-ledsuser-led ouser_led uheartbeat on "defaulthdmi-con,hdmi-connectoraportendpoint]dc-5v-regulator,regulator-fixeddc_5vLK@LK@vcc3v3-sys-regulator,regulator-fixed vcc3v3_sys2Z2Z&!$vcc5v0-sys-regulator,regulator-fixed vcc5v0_sysLK@LK@&!vcc3v3-m2-pcie-regulator,regulator-fixed m2_pcie_3v3 2Z2Z "default  @&!vcc3v3-mini-pcie-regulator,regulator-fixed minipcie_3v3 2Z2Z ILdefault &!`vcc5v0-usb20-host-regulator,regulator-fixedvcc5v0_usb20_host  I"defaultvcc5v0-usb30-host-regulator,regulator-fixedvcc5v0_usb30_host  I"defaultvcc5v0-otg-vbus-regulator,regulator-fixedvcc5v0_otg_vbus LK@LK@ I"default interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyno-sdiono-mmcbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-hs200-1_8vnon-removablesupports-emmcdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfstdout-pathlabellinux,default-triggerdefault-stateenable-active-highstartup-delay-us