a8R`(`R()rockchip,rk3588-evb1-v10rockchip,rk3588 +7Rockchip RK3588 EVB1 V10 Boardaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/ethernet@fe1b0000/mmc@fe2e0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55psci"5 < L0,a q~@@  "cpu@100cpuarm,cortex-a55psci"5 a q~@@ "cpu@200cpuarm,cortex-a55psci"5 a q~@@ "cpu@300cpuarm,cortex-a55psci"5 a q~@@ "cpu@400cpuarm,cortex-a76psci"5 < L0,a q~@@"cpu@500cpuarm,cortex-a76psci"5 a q~@@"cpu@600cpuarm,cortex-a76psci"5 < L0,a q~@@"cpu@700cpuarm,cortex-a76psci"5 a q~@@" idle-states*pscicpu-sleeparm,idle-state7H_dpx" l2-cache-l0caches@" l2-cache-l1caches@"l2-cache-l2caches@"l2-cache-l3caches@"l2-cache-b0caches@"l2-cache-b1caches@"l2-cache-b2caches@"l2-cache-b3caches@"l3-cachecaches0@"display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14" protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    % sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram+sram@0arm,scmi-shmem"gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf < L 5!corecoregroupstacks 0\]^  jobmmugpu- ;okay!B"N#"usb@fc000000rockchip,rk3588-dwc3snps,dwc3@5!ref_clksuspend_clkbus_clkZotg b$%gusb2-phyusb3-phy qutmi_wide- zR ;okay-port+endpoint@0=&"usb@fc800000"rockchip,rk3588-ehcigeneric-ehci5'b(gusb- ;okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci5'b(gusb- ;okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci5)b*gusb- ;okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci5)b*gusb- ;okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(5jihkr&!ref_clksuspend_clkbus_clkutmipipeZhostb+ gusb3-phy qutmi_widez4 M ;disablediommu@fc900000 arm,smmu-v3 @qsvo eventqgerrorpriqcmdq-syncg ;disablediommu@fcb00000 arm,smmu-v3 @}{ eventqgerrorpriqcmdq-syncg ;disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX"jsyscon@fd58c000rockchip,rk3588-sys-grfsysconX"esyscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ "fsyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` 5"syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@5"gsyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@"syscon@fd5b0000rockchip,rk3588-php-grfsyscon["-syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon["syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@"syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@"syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+"usb2phy@0rockchip,rk3588-usb2phy5!phyclk usb480m_phy0zmtphyapb;okay"otg-port;okay"$syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy5!phyclk usb480m_phy2zotphyapb;okay"'host-port;okay,"(syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy5!phyclk usb480m_phy3zp tphyapb;okay")host-port;okay,"*syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^"syscon@fd5f0000rockchip,rk3588-iocsyscon_"sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|<]q@LA.2Fq)׫ׄe/ׄ eZ р -"i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=5ts !i2cpclk.default+ ;disabledserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK5!baudclkapb_pclk//txrx0default ;disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5 !pwmpclk1default ;disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5 !pwmpclk2default ;disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5 !pwmpclk3default;okay"pwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05 !pwmpclk4default ;disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd"hpower-controller!rockchip,rk3588-power-controller+;okay" power-domain@8+power-domain@9  5!#" 567+power-domain@10 5!#"8power-domain@11 5!#"9power-domain@12 5:;<=power-domain@13 +power-domain@14(5>power-domain@15 5?power-domain@165 @AB+power-domain@17 5 CDEpower-domain@215 FGHIJKLM+power-domain@235CANpower-domain@14 5>power-domain@155?power-domain@225Opower-domain@245[Z]PQ+power-domain@2585ZRpower-domain@2685QSTpower-domain@2705UVWX+power-domain@28 5YZpower-domain@29(5[\power-domain@305z{]power-domain@31@5W^_`apower-domain@33!5WZ[power-domain@34"5WZ[power-domain@37%52bpower-domain@38&545power-domain@40(cvideo-codec@fdc70000rockchip,rk3588-av1-vpul vdpu<ACLׄׄ5AC !aclkhclk-  zvop@fdd90000rockchip,rk3588-vop BPvopgamma-lut85]\abcd[7!aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vopd- ef)g:h ;disabledports+"port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~5]\ !aclkifaceg-  ;disabled"di2s@fddc0000rockchip,rk3588-i2s-tdm5!mclk_txmclk_rxhclk<Gitx- zttx-m^ ;disabledi2s@fddf0000rockchip,rk3588-i2s-tdm5445!mclk_txmclk_rxhclk<1Gitx- zttx-m^ ;disabledi2s@fddfc000rockchip,rk3588-i2s-tdm500,!mclk_txmclk_rxhclk<-Girx- ztrx-m^ ;disabledqos@fdf35000rockchip,rk3588-qossysconP ":qos@fdf35200rockchip,rk3588-qossysconR ";qos@fdf35400rockchip,rk3588-qossysconT "<qos@fdf35600rockchip,rk3588-qossysconV "=qos@fdf36000rockchip,rk3588-qossyscon` "]qos@fdf39000rockchip,rk3588-qossyscon "bqos@fdf3d800rockchip,rk3588-qossyscon "cqos@fdf3e000rockchip,rk3588-qossyscon "_qos@fdf3e200rockchip,rk3588-qossyscon "^qos@fdf3e400rockchip,rk3588-qossyscon "`qos@fdf3e600rockchip,rk3588-qossyscon "aqos@fdf40000rockchip,rk3588-qossyscon "[qos@fdf40200rockchip,rk3588-qossyscon "\qos@fdf40400rockchip,rk3588-qossyscon "Uqos@fdf40500rockchip,rk3588-qossyscon "Vqos@fdf40600rockchip,rk3588-qossyscon "Wqos@fdf40800rockchip,rk3588-qossyscon "Xqos@fdf41000rockchip,rk3588-qossyscon "Yqos@fdf41100rockchip,rk3588-qossyscon "Zqos@fdf60000rockchip,rk3588-qossyscon "@qos@fdf60200rockchip,rk3588-qossyscon "Aqos@fdf60400rockchip,rk3588-qossyscon "Bqos@fdf61000rockchip,rk3588-qossyscon "Cqos@fdf61200rockchip,rk3588-qossyscon "Dqos@fdf61400rockchip,rk3588-qossyscon "Eqos@fdf62000rockchip,rk3588-qossyscon ">qos@fdf63000rockchip,rk3588-qossyscon0 "?qos@fdf64000rockchip,rk3588-qossyscon@ "Nqos@fdf66000rockchip,rk3588-qossyscon` "Fqos@fdf66200rockchip,rk3588-qossysconb "Gqos@fdf66400rockchip,rk3588-qossyscond "Hqos@fdf66600rockchip,rk3588-qossysconf "Iqos@fdf66800rockchip,rk3588-qossysconh "Jqos@fdf66a00rockchip,rk3588-qossysconj "Kqos@fdf66c00rockchip,rk3588-qossysconl "Lqos@fdf66e00rockchip,rk3588-qossysconn "Mqos@fdf67000rockchip,rk3588-qossysconp "Oqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon "8qos@fdf71000rockchip,rk3588-qossyscon "9qos@fdf72000rockchip,rk3588-qossyscon "5qos@fdf72200rockchip,rk3588-qossyscon" "6qos@fdf72400rockchip,rk3588-qossyscon$ "7qos@fdf80000rockchip,rk3588-qossyscon "Rqos@fdf81000rockchip,rk3588-qossyscon "Sqos@fdf81200rockchip,rk3588-qossyscon "Tqos@fdf82000rockchip,rk3588-qossyscon "Pqos@fdf82200rockchip,rk3588-qossyscon" "Qdfi@fe060000rockchip,rk3588-dfi@&0::jpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcieo0?05CH>MR)!aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerry`kkkk0l0b+ gpcie-phy- "T @ @0 @@dbiapbconfigz). tpwrpipe+;okay mdefaultnolegacy-interrupt-controllery "kpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcieo@O05DI?NSs)!aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerry`pppp@l@bq gpcie-phy- "T @ @0 A@dbiapbconfigz*/ tpwrpipe+ ;disabledlegacy-interrupt-controllery "pethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(567Y^50!stmmacethclk_mac_refpclk_macaclk_macptp_ref- !z$ tstmmacethe-r0sCtV ;disabledmdiosnps,dwmac-mdio+stmmac-axi-config_iy"rrx-queues-config"squeue0queue1tx-queues-config"tqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(5b_eTo!satapmaliverxoobrefasic+;okaysata-port@0@bq gsata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(5dagVq!satapmaliverxoobrefasic+ ;disabledsata-port@0@b+ gsata-phy  spi@fe2b0000 rockchip,sfc+@5/0!clk_sfchclk_sfc+ ;disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ 5  !biuciuciu-driveciu-sample defaultuvwx- ( ;disabledmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ 5!biuciuciu-driveciu-sample defaulty- % ;disabledmmc@fe2e0000rockchip,rk3588-dwcmshc.<-., L n6 (5,*+-.!corebusaxiblocktimer z{|}~default(ztcorebusaxiblocktimer;okay #1@i2s@fe470000rockchip,rk3588-i2s-tdmG5+/(!mclk_txmclk_rxhclk<)-G//txrx- &z*+ ttx-mrx-mZdefault^;okay"i2s@fe480000rockchip,rk3588-i2s-tdmH5y}u!mclk_txmclk_rxhclk//txrxz^_ ttx-mrx-mZdefault(^ ;disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI5!i2s_clki2s_hclk<Gtxrx- &default^ ;disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ5%!i2s_clki2s_hclk<"Gtxrx- &default^ ;disabledinterrupt-controller@fe600000 arm,gic-v3 `h ua8y+"msi-controller@fe640000arm,gic-v3-itsd"lmsi-controller@fe660000arm,gic-v3-itsf"ppi-partitionsinterrupt-partition-0"interrupt-partition-1 "dma-controller@fea10000arm,pl330arm,primecell@ VW5n !apb_pclk"/dma-controller@fea30000arm,pl330arm,primecell@ XY5o !apb_pclk"i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c5{ !i2cpclk>default+ ;disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c5| !i2cpclk?default+;okayusb-typec@22 fcs,fusb302"  default;okayconnectorusb-c-connectorUSB-CdualB@duald,sourceports+port@0endpoint="port@1endpoint="&port@2endpoint="rtc@51haoyu,hym8563Qhym8563default -i2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c5} !i2cpclk@default+ ;disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c5~ !i2cpclkAdefault+ ;disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkBdefault+ ;disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !5TW !pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt5dc !tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF5!spiclkapb_pclk//txrx; default+ ;disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG5!spiclkapb_pclk//txrx; default+ ;disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH5!spiclkapb_pclktxrx; default+;okay<L pmic@0rockchip,rk806BN default^B@p    ( 5dvs1-null-pins Agpio_pwrctrl1 Fpin_fun0"dvs2-null-pins Agpio_pwrctrl2 Fpin_fun0"dvs3-null-pins Agpio_pwrctrl3 Fpin_fun0"regulatorsdcdc-reg1 O c udp ~ 0 vdd_gpu_s0  # '""regulator-state-mem dcdc-reg2 O c udp ~ 0 vdd_npu_s0regulator-state-mem dcdc-reg3 O c u L q 0 vdd_log_s0regulator-state-mem  2 qdcdc-reg4 O c udp ~ 0 vdd_vdenc_s0regulator-state-mem dcdc-reg5 O c u L ~ 0  vdd_gpu_mem_s0 " '"#regulator-state-mem dcdc-reg6 O c u L ~ 0 vdd_npu_mem_s0regulator-state-mem dcdc-reg7 O c u  0 vdd_2v0_pldo_s3"regulator-state-mem N 2dcdc-reg8 O c u L ~ 0 vdd_vdenc_mem_s0regulator-state-mem dcdc-reg9 O c vdd2_ddr_s3regulator-state-mem Ndcdc-reg10 O c u  0 vcc_1v1_nldo_s3"regulator-state-mem N 2pldo-reg1 O c uw@ w@ 0 avcc_1v8_s0"regulator-state-mem pldo-reg2 O c uw@ w@ 0 vdd1_1v8_ddr_s3regulator-state-mem N 2w@pldo-reg3 O c uw@ w@ 0 avcc_1v8_codec_s0"regulator-state-mem pldo-reg4 O c u2Z 2Z 0 vcc_3v3_s3regulator-state-mem N 22Zpldo-reg5 O c uw@ 2Z 0 vccio_sd_s0regulator-state-mem pldo-reg6 O c uw@ w@ 0 vccio_1v8_s3regulator-state-mem N 2w@nldo-reg1 O c u q q 0 vdd_0v75_s3regulator-state-mem N 2 qnldo-reg2 O c u   vdd2l_0v9_ddr_s3regulator-state-mem N 2 nldo-reg3 O c u q q vdd_0v75_hdmi_edp_s0regulator-state-mem nldo-reg4 O c u q q avdd_0v75_s0"regulator-state-mem nldo-reg5 O c u P P vdd_0v85_s0regulator-state-mem pmic@1rockchip,rk806BN  default^B@    ( 5dvs1-null-pins Agpio_pwrctrl1 Fpin_fun0"dvs2-null-pins Agpio_pwrctrl2 Fpin_fun0"dvs3-null-pins Agpio_pwrctrl3 Fpin_fun0"regulatorsdcdc-reg1 O c  ' udp  0 vdd_cpu_big1_s0"regulator-state-mem dcdc-reg2 O c  ' udp  0 vdd_cpu_big0_s0"regulator-state-mem dcdc-reg3 O c  ' udp ~ 0 vdd_cpu_lit_s0"regulator-state-mem dcdc-reg4 O c u2Z 2Z 0 vcc_3v3_s0"regulator-state-mem dcdc-reg5 O c  ' u L  0 vdd_cpu_big1_mem_s0"regulator-state-mem dcdc-reg6 O c  ' u L  0 vdd_cpu_big0_mem_s0"regulator-state-mem dcdc-reg7 O c uw@ w@ 0 vcc_1v8_s0"regulator-state-mem dcdc-reg8 O c  ' u L ~ 0 vdd_cpu_lit_mem_s0"regulator-state-mem dcdc-reg9 O c vddq_ddr_s0regulator-state-mem dcdc-reg10 O c u L  0 vdd_ddr_s0regulator-state-mem pldo-reg1 O c uw@ w@ 0 vcc_1v8_cam_s0regulator-state-mem pldo-reg2 O c uw@ w@ 0 avdd1v8_ddr_pll_s0regulator-state-mem pldo-reg3 O c uw@ w@ 0 vdd_1v8_pll_s0regulator-state-mem pldo-reg4 O c u2Z 2Z 0 vcc_3v3_sd_s0regulator-state-mem pldo-reg5 O c u* * 0 vcc_2v8_cam_s0regulator-state-mem pldo-reg6 O c uw@ w@ pldo6_s3regulator-state-mem N 2w@nldo-reg1 O c u q q 0 vdd_0v75_pll_s0regulator-state-mem nldo-reg2 O c u P P vdd_ddr_pll_s0regulator-state-mem nldo-reg3 O c u P P 0 avdd_0v85_s0"regulator-state-mem nldo-reg4 O c uO O 0 avdd_1v2_cam_s0regulator-state-mem nldo-reg5 O c uO O 0 avdd_1v2_s0regulator-state-mem spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI5!spiclkapb_pclktxrx; default+ ;disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL5!baudclkapb_pclk// txrxdefault ;disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM5!baudclkapb_pclk/ / txrxdefault;okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN5!baudclkapb_pclk/ / txrxdefault ;disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO5!baudclkapb_pclk txrxdefault ;disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP5!baudclkapb_pclk txrxdefault ;disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ5!baudclkapb_pclk txrxdefault ;disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR5!baudclkapb_pclkiitxrxdefault ;disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS5!baudclkapb_pclki i txrxdefault ;disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT5!baudclkapb_pclki i txrxdefault ;disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK !pwmpclkdefault ;disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK !pwmpclkdefault ;disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5LK !pwmpclkdefault ;disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05LK !pwmpclkdefault ;disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON !pwmpclkdefault ;disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON !pwmpclkdefault ;disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5ON !pwmpclkdefault ;disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05ON !pwmpclkdefault ;disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ !pwmpclkdefault ;disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ !pwmpclkdefault ;disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5RQ !pwmpclkdefault ;disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05RQ !pwmpclkdefault ;disabledthermal-zonespackage-thermal f | tripspackage-crit 8   criticalbigcore0-thermal fd | tripsbigcore0-alert L  passive"bigcore0-crit 8   criticalcooling-mapsmap0  bigcore2-thermal fd | tripsbigcore2-alert L  passive"bigcore2-crit 8   criticalcooling-mapsmap0   littlecore-thermal fd | tripslittlecore-alert L  passive"littlecore-crit 8   criticalcooling-mapsmap0 0 center-thermal f | tripscenter-crit 8   criticalgpu-thermal fd | tripsgpu-alert L  passive"gpu-crit 8   criticalcooling-mapsmap0  npu-thermal f | tripsnpu-crit 8   criticaltsadc@fec00000rockchip,rk3588-tsadc5!tsadcapb_pclk<LzVWttsadc-apbtsadc     gpiootpout ;okay"adc@fec10000rockchip,rk3588-saradc .5!saradcapb_pclkzU tsaradc-apb;okay @"i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkCdefault+ ;disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkDdefault+;okayaudio-codec@11everest,es838851<1L L X d e^"i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkEdefault+ ;disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ5!spiclkapb_pclki itxrx; default+ ;disabledefuse@fecc0000rockchip,rk3588-otp 5!otpapb_pclkphyarbz totpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c qnpu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[5p !apb_pclk"iphy@fed60000rockchip,rk3588-hdptx-phy 5T!refapb8z#cde!""tphyapbinitcmnlaneroplllcpll ;disabledphy@fed80000rockchip,rk3588-usbdp-phy5lV!refclkimmortalpclkutmi(z   tinitcmnlanepcs_apbpma_apb v   ;okay   m m"%port+endpoint@0="endpoint@1="phy@fee00000rockchip,rk3588-naneng-combphy5vW !refapbpipe<Lz<Ctphyapb - ;okay"qphy@fee20000rockchip,rk3588-naneng-combphy5xW !refapbpipe<Lz>Etphyapb - ;okay"+sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrl+"gpio@fd8a0000rockchip,gpio-bank5qrN # By"gpio@fec20000rockchip,gpio-bank5stN # By"gpio@fec30000rockchip,gpio-bank5uvN #@ Bygpio@fec40000rockchip,gpio-bank5wxN #` By"gpio@fec50000rockchip,gpio-bank5yzN # By"mpcfg-pull-up /"pcfg-pull-down <"pcfg-pull-none K"pcfg-pull-none-drv-level-2 K X"pcfg-pull-up-drv-level-1 / X"pcfg-pull-up-drv-level-2 / X"pcfg-pull-none-smt K g"auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout |"zemmc-bus8 |"{emmc-clk |"|emmc-cmd |"}emmc-data-strobe |"~eth1fspigmac1gpuhdmii2c0i2c0m0-xfer | ".i2c1i2c1m0-xfer |  "i2c2i2c2m0-xfer |  "i2c3i2c3m0-xfer |  "i2c4i2c4m0-xfer |  "i2c5i2c5m0-xfer |  "i2c6i2c6m0-xfer |  "i2c7i2c7m0-xfer |  "i2c8i2c8m0-xfer |  "i2s0i2s0-lrck |"i2s0-mclk |"i2s0-sclk |"i2s0-sdi0 |"i2s0-sdo0 |"i2s1i2s1m0-lrck |"i2s1m0-sclk |"i2s1m0-sdi0 |"i2s1m0-sdi1 |"i2s1m0-sdi2 |"i2s1m0-sdi3 |"i2s1m0-sdo0 | "i2s1m0-sdo1 | "i2s1m0-sdo2 | "i2s1m0-sdo3 | "i2s2i2s2m1-lrck |"i2s2m1-sclk | "i2s2m1-sdi | "i2s2m1-sdo | "i2s3i2s3-lrck |"i2s3-sclk |"i2s3-sdi |"i2s3-sdo |"jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp |"pmupwm0pwm0m0-pins |"1pwm1pwm1m0-pins |"2pwm2pwm2m0-pins |"3pwm3pwm3m0-pins |"4pwm4pwm4m0-pins | "pwm5pwm5m0-pins | "pwm6pwm6m0-pins | "pwm7pwm7m0-pins | "pwm8pwm8m0-pins | "pwm9pwm9m0-pins | "pwm10pwm10m0-pins | "pwm11pwm11m0-pins | "pwm12pwm12m0-pins | "pwm13pwm13m0-pins | "pwm14pwm14m0-pins | "pwm15pwm15m0-pins | "refclksatasata0sata1sata2sdiosdiom1-pins` |"ysdmmcsdmmc-bus4@ |"xsdmmc-clk |"usdmmc-cmd |"vsdmmc-det |"wspdif0spdif1spi0spi0m0-pins0 |"spi0m0-cs0 |"spi0m0-cs1 |"spi1spi1m1-pins0 |"spi1m1-cs0 |"spi1m1-cs1 |"spi2spi2m2-pins0 | "spi2m2-cs0 | "spi2m2-cs1 |"spi3spi3m1-pins0 | "spi3m1-cs0 |"spi3m1-cs1 |"spi4spi4m0-pins0 |"spi4m0-cs0 |"spi4m0-cs1 |"tsadctsadc-shut |"uart0uart0m1-xfer | "0uart1uart1m1-xfer |  "uart2uart2m0-xfer | "uart3uart3m1-xfer |  "uart4uart4m1-xfer |  "uart5uart5m1-xfer |  "uart6uart6m1-xfer |  "uart7uart7m1-xfer |  "uart8uart8m1-xfer |  "uart9uart9m1-xfer |  "vopbt656gpio-functsadc-gpio-func |"eth0gmac0gmac0-miim |"gmac0-rx-bus20 |"gmac0-tx-bus20 |"gmac0-rgmii-clk | "gmac0-rgmii-bus@ |  "audioheadphone-detect |"headphone-amplifier-en |"speaker-amplifier-en |"rtl8111rtl8111-isolate |"ortl8211frtl8211f-rst | " hym8563hym8563-int |"pcie2pcie2-1-rst |"npcie3pcie3-reset |"vcc3v3-pcie30-en |" usbvcc5v0-host-en |"!usb-typectypec5v-pwren |"usbc0-int | "usb@fc400000rockchip,rk3588-dwc3snps,dwc3@@5!ref_clksuspend_clkbus_clkZhost bgusb2-phyusb3-phy qutmi_wide- zS ;okaysyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon["syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\" syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon\@" syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@@+" usb2phy@4000rockchip,rk3588-usb2phy@5!phyclk usb480m_phy1zntphyapb;okay" otg-port;okay"i2s@fddc8000rockchip,rk3588-i2s-tdm܀5!mclk_txmclk_rxhclk<Gitx- zttx-m^ ;disabledi2s@fddf4000rockchip,rk3588-i2s-tdm@599?!mclk_txmclk_rxhclk<6Gitx- zttx-m^ ;disabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀5++'!mclk_txmclk_rxhclk<(Girx- ztrx-m^ ;disabledi2s@fde00000rockchip,rk3588-i2s-tdm5&&"!mclk_txmclk_rxhclk<#Girx- ztrx-m^ ;disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+o05@E;JOt)!aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerry`b gpcie-phy- "T @ @0 @@dbiapbconfigz&+ tpwrpipe;okaydefault m legacy-interrupt-controllery "pcie-ep@fe150000rockchip,rk3588-pcie-epP @ @ @ @0dbidbi2apbaddr_spaceatu05@E;JOt)!aclk_mstaclk_slvaclk_dbipclkauxpipe + syspmcmsglegacyerrdma0dma1dma2dma3b gpcie-phy- "z&+ tpwrpipe ;disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+o05AF<KPu)!aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerry`b gpcie-phy- "T @ @@0 @@@dbiapbconfigz', tpwrpipe ;disabledlegacy-interrupt-controllery "pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcieo /05BG=LQ)!aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerry` l b gpcie-phy- "T @ @0 @@dbiapbconfigz(- tpwrpipe+ ;disabledlegacy-interrupt-controllery "ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(567X]40!stmmacethclk_mac_refpclk_macaclk_macptp_ref- !z# tstmmacethe-0CV;okay output  rgmii-rxiddefault  Cmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916default  N   m "stmmac-axi-config_iy"rx-queues-config"queue0queue1tx-queues-config"queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(5c`fUp!satapmaliverxoobrefasic+ ;disabledsata-port@0@b gsata-phy  phy@fed90000rockchip,rk3588-usbdp-phy5mW !refclkimmortalpclkutmi(ztinitcmnlanepcs_apbpma_apb v     ;okay "phy@fee10000rockchip,rk3588-naneng-combphy5wW !refapbpipe<Lz=Dtphyapb -   ;disabled"phy@fee80000rockchip,rk3588-pcie3-phy5y!pclkzHtphy - ;okay"opp-table-cluster0operating-points-v2 " opp-1008000000 < ' L L~ 5@opp-1200000000 G ' 4 4~ 5@opp-1416000000 Tfr ' ~ 5@ Fopp-1608000000 _" ' P P~ 5@opp-1800000000 kI '~~~ 5@opp-table-cluster1operating-points-v2 "opp-1200000000 G ' L LB@ 5@opp-1416000000 Tfr '  B@ 5@opp-1608000000 _" ' B@ 5@opp-1800000000 kI ' P PB@ 5@opp-2016000000 x) 'HHB@ 5@opp-2208000000 h 'llB@ 5@opp-2400000000  'B@B@B@ 5@opp-table-cluster2operating-points-v2 "opp-1200000000 G ' L LB@ 5@opp-1416000000 Tfr '  B@ 5@opp-1608000000 _" ' B@ 5@opp-1800000000 kI ' P PB@ 5@opp-2016000000 x) 'HHB@ 5@opp-2208000000 h 'llB@ 5@opp-2400000000  'B@B@B@ 5@opp-tableoperating-points-v2"!opp-300000000  ' L L Popp-400000000 ׄ ' L L Popp-500000000 e ' L L Popp-600000000 #F ' L L Popp-700000000 )' ' ` ` Popp-800000000 / ' q q Popp-900000000 5 ' 5 5 Popp-1000000000 ; ' P P Pchosen Rserial2:1500000n8adc-keys adc-keys ^ jbuttons {w@ dbutton-vol-up Volume Up s Bhbutton-vol-down Volume Down r \button-menuMenu  button-escapeEscape  8analog-soundsimple-audio-carddefault RK3588 EVB1 Audio  i2s5 TrHeadphonesSpeakerdSpeaker Amplifier INLLOUT2Speaker Amplifier INRROUT2SpeakerSpeaker Amplifier OUTLSpeakerSpeaker Amplifier OUTRHeadphones Amplifier INLLOUT1Headphones Amplifier INRROUT1HeadphonesHeadphones Amplifier OUTLHeadphonesHeadphones Amplifier OUTRLINPUT1Onboard MicrophoneRINPUT1Onboard MicrophoneLINPUT2Microphone JackRINPUT2Microphone Jack^MicrophoneMicrophone JackMicrophoneOnboard MicrophoneHeadphoneHeadphonesSpeakerSpeakersimple-audio-card,cpusimple-audio-card,codec"headphone-amplifiersimple-audio-amplifier default Headphones Amplifier"speaker-amplifiersimple-audio-amplifier default Speaker Amplifier"backlightpwm-backlight,apcie20-avdd0v85-regulatorregulator-fixed pcie20_avdd0v85 O c u P P1pcie20-avdd1v8-regulatorregulator-fixed pcie20_avdd1v8 O c uw@ w@1pcie30-avdd0v75-regulatorregulator-fixed pcie30_avdd0v75 O c u q q1pcie30-avdd1v8-regulatorregulator-fixed pcie30_avdd1v8 O c uw@ w@1vbus5v0-typec-regulatorregulator-fixed< mmdefault vbus5v0_typec uLK@ LK@1"vcc12v-dcin-regulatorregulator-fixed vcc12v_dcin O c u "vcc3v3-pcie30-regulatorregulator-fixed vcc3v3_pcie30 u2Z 2Z< O1default "vcc5v0-host-regulatorregulator-fixed vcc5v0_host c O uLK@ LK@< mmdefault!1",vcc5v0-sys-regulatorregulator-fixed vcc5v0_sys O c uLK@ LK@1"vcc5v0-usbdcin-regulatorregulator-fixed vcc5v0_usbdcin O c uLK@ LK@1""vcc5v0-usb-regulatorregulator-fixed vcc5v0_usb O c uLK@ LK@1"" compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplysram-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesdmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthno-sdiono-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsvbus-supplylabeldata-roleop-sink-microwattpower-rolesink-pdossource-pdostry-power-rolewakeup-sourcenum-cs#gpio-cellsgpio-controllerspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-nameregulator-enable-ramp-delayregulator-coupled-withregulator-coupled-max-spreadregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfmode-switchorientation-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsvpcie3v3-supplyclock_in_outphy-handlephy-moderx_delaytx_delayreset-assert-usreset-deassert-usrockchip,dp-lane-muxrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltsimple-audio-card,namesimple-audio-card,aux-devssimple-audio-card,bitclock-mastersimple-audio-card,formatsimple-audio-card,frame-mastersimple-audio-card,hp-det-gpiosimple-audio-card,mclk-fssimple-audio-card,pin-switchessimple-audio-card,routingsimple-audio-card,widgetssound-daisystem-clock-frequencyenable-gpiossound-name-prefixpower-supplypwmsvin-supplyenable-active-highstartup-delay-us