Y8J(J#pine64,quartzpro64rockchip,rk3588 +7Pine64 QuartzPro64aliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/ethernet@fe1b0000/mmc@fe2e0000/mmc@fe2c0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0 cpuarm,cortex-a55psci': A Q0,f v@@  'cpu@100 cpuarm,cortex-a55psci': f v@@ 'cpu@200 cpuarm,cortex-a55psci': f v@@ 'cpu@300 cpuarm,cortex-a55psci': f v@@ 'cpu@400 cpuarm,cortex-a76psci': A Q0,f v@@'cpu@500 cpuarm,cortex-a76psci': f v@@'cpu@600 cpuarm,cortex-a76psci': A Q0,f v@@'cpu@700 cpuarm,cortex-a76psci': f v@@' idle-states/pscicpu-sleeparm,idle-state<Mddux' l2-cache-l0cachex@' l2-cache-l1cachex@'l2-cache-l2cachex@'l2-cache-l3cachex@'l2-cache-b0cachex@'l2-cache-b1cachex@'l2-cache-b2cachex@'l2-cache-b3cachex@'l3-cachecachex0@'display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tz smcscmi arm,scmi-smc+protocol@14' protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0 smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram+sram@0arm,scmi-shmem'gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf A Q :&corecoregroupstacks 0\]^ jobmmugpu2 @okay!G"S#'usb@fc000000rockchip,rk3588-dwc3snps,dwc3@:&ref_clksuspend_clkbus_clk_otg g$%lusb2-phyusb3-phy vutmi_wide2 R @disabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci:&g'lusb2 @okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci:&g'lusb2 @okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci:(g)lusb2 @okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci:(g)lusb2 @okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(:jihkr&&ref_clksuspend_clkbus_clkutmipipe_hostg* lusb3-phy vutmi_wide42 @disablediommu@fc900000 arm,smmu-v3 @qsvoeventqgerrorpriqcmdq-syncL @disablediommu@fcb00000 arm,smmu-v3 @}{eventqgerrorpriqcmdq-syncL @disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX'isyscon@fd58c000rockchip,rk3588-sys-grfsysconX'dsyscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ 'esyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` :'syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@:'fsyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@'syscon@fd5b0000rockchip,rk3588-php-grfsyscon[',syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon['syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@'syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@'syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+'usb2phy@0rockchip,rk3588-usb2phy:&phyclk usb480m_phy0mYphyapb @disabled'otg-porte @disabled'$syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy:&phyclk usb480m_phy2oYphyapb@okay'&host-porte@okayp+''syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy:&phyclk usb480m_phy3p Yphyapb@okay'(host-porte@okayp+')syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^'syscon@fd5f0000rockchip,rk3588-iocsyscon_'sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|A]q@QA.2Fq)׫ׄe/ׄ eZ р {,'i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=:ts &i2cpclk-default+ @disabledserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK:&baudclkapb_pclk..txrx/default @disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm: &pwmpclk0default @disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm: &pwmpclk1default @disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm : &pwmpclk2default @disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0: &pwmpclk3default @disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd'gpower-controller!rockchip,rk3588-power-controller+@okay' power-domain@8+power-domain@9  :!#" 456+power-domain@10 :!#"7power-domain@11 :!#"8power-domain@12 :9:;<power-domain@13 +power-domain@14(:=power-domain@15 :>power-domain@16: ?@A+power-domain@17 : BCDpower-domain@21: EFGHIJKL+power-domain@23:CAMpower-domain@14 :=power-domain@15:>power-domain@22:Npower-domain@24:[Z]OP+power-domain@258:ZQpower-domain@268:QRSpower-domain@270:TUVW+power-domain@28 :XYpower-domain@29(:Z[power-domain@30:z{\power-domain@31@:W]^_`power-domain@33!:WZ[power-domain@34":WZ[power-domain@37%:2apower-domain@38&:45power-domain@40(bvideo-codec@fdc70000rockchip,rk3588-av1-vpulvdpuAACQׄׄ:AC &aclkhclk2  vop@fdd90000rockchip,rk3588-vop BPvopgamma-lut8:]\abcd[7&aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vopc2 {defg @disabledports+'port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~:]\ &aclkifaceL2  @disabled'ci2s@fddc0000rockchip,rk3588-i2s-tdm:&mclk_txmclk_rxhclkA,htx2 Ytx-mC @disabledi2s@fddf0000rockchip,rk3588-i2s-tdm:445&mclk_txmclk_rxhclkA1,htx2 Ytx-mC @disabledi2s@fddfc000rockchip,rk3588-i2s-tdm:00,&mclk_txmclk_rxhclkA-,hrx2 Yrx-mC @disabledqos@fdf35000rockchip,rk3588-qossysconP '9qos@fdf35200rockchip,rk3588-qossysconR ':qos@fdf35400rockchip,rk3588-qossysconT ';qos@fdf35600rockchip,rk3588-qossysconV '<qos@fdf36000rockchip,rk3588-qossyscon` '\qos@fdf39000rockchip,rk3588-qossyscon 'aqos@fdf3d800rockchip,rk3588-qossyscon 'bqos@fdf3e000rockchip,rk3588-qossyscon '^qos@fdf3e200rockchip,rk3588-qossyscon ']qos@fdf3e400rockchip,rk3588-qossyscon '_qos@fdf3e600rockchip,rk3588-qossyscon '`qos@fdf40000rockchip,rk3588-qossyscon 'Zqos@fdf40200rockchip,rk3588-qossyscon '[qos@fdf40400rockchip,rk3588-qossyscon 'Tqos@fdf40500rockchip,rk3588-qossyscon 'Uqos@fdf40600rockchip,rk3588-qossyscon 'Vqos@fdf40800rockchip,rk3588-qossyscon 'Wqos@fdf41000rockchip,rk3588-qossyscon 'Xqos@fdf41100rockchip,rk3588-qossyscon 'Yqos@fdf60000rockchip,rk3588-qossyscon '?qos@fdf60200rockchip,rk3588-qossyscon '@qos@fdf60400rockchip,rk3588-qossyscon 'Aqos@fdf61000rockchip,rk3588-qossyscon 'Bqos@fdf61200rockchip,rk3588-qossyscon 'Cqos@fdf61400rockchip,rk3588-qossyscon 'Dqos@fdf62000rockchip,rk3588-qossyscon '=qos@fdf63000rockchip,rk3588-qossyscon0 '>qos@fdf64000rockchip,rk3588-qossyscon@ 'Mqos@fdf66000rockchip,rk3588-qossyscon` 'Eqos@fdf66200rockchip,rk3588-qossysconb 'Fqos@fdf66400rockchip,rk3588-qossyscond 'Gqos@fdf66600rockchip,rk3588-qossysconf 'Hqos@fdf66800rockchip,rk3588-qossysconh 'Iqos@fdf66a00rockchip,rk3588-qossysconj 'Jqos@fdf66c00rockchip,rk3588-qossysconl 'Kqos@fdf66e00rockchip,rk3588-qossysconn 'Lqos@fdf67000rockchip,rk3588-qossysconp 'Nqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon '7qos@fdf71000rockchip,rk3588-qossyscon '8qos@fdf72000rockchip,rk3588-qossyscon '4qos@fdf72200rockchip,rk3588-qossyscon" '5qos@fdf72400rockchip,rk3588-qossyscon$ '6qos@fdf80000rockchip,rk3588-qossyscon 'Qqos@fdf81000rockchip,rk3588-qossyscon 'Rqos@fdf81200rockchip,rk3588-qossyscon 'Sqos@fdf82000rockchip,rk3588-qossyscon 'Oqos@fdf82200rockchip,rk3588-qossyscon" 'Pdfi@fe060000rockchip,rk3588-dfi@&0:ipcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcieT0?0:CH>MR)&aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr^o`jjjj0k0g* lpcie-phy2 "T @ @0 @@dbiapbconfig). Ypwrpipe+@okaydefaultl mlegacy-interrupt-controller^ 'jpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcieT@O0:DI?NSs)&aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr^o`nnnn@k@go lpcie-phy2 "T @ @0 A@dbiapbconfig*/ Ypwrpipe+ @disabledlegacy-interrupt-controller^ 'nethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(:67Y^50&stmmacethclk_mac_refpclk_macaclk_macptp_ref2 !$ Ystmmaceth{d,pq(r; @disabledmdiosnps,dwmac-mdio+stmmac-axi-configDN^'prx-queues-confign'qqueue0queue1tx-queues-config'rqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(:b_eTo&satapmaliverxoobrefasic+@okaysata-port@0@go lsata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(:dagVq&satapmaliverxoobrefasic+ @disabledsata-port@0@g* lsata-phy  spi@fe2b0000 rockchip,sfc+@:/0&clk_sfchclk_sfc+ @disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ :  &biuciuciu-driveciu-sampleрdefaultstuv2 (@okay  w'.<xHymmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ :&biuciuciu-driveciu-sample defaultz2 % @disabledmmc@fe2e0000rockchip,rk3588-dwcmshc.A-., Q n6 (:,*+-.&corebusaxiblocktimerр{|}~default(Ycorebusaxiblocktimer@okayU[ixi2s@fe470000rockchip,rk3588-i2s-tdmG:+/(&mclk_txmclk_rxhclkA)-,..txrx2 &*+ Ytx-mrx-mdefaultC@okay'i2s@fe480000rockchip,rk3588-i2s-tdmH:y}u&mclk_txmclk_rxhclk..txrx^_ Ytx-mrx-mdefault(C @disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI:&i2s_clki2s_hclkA,txrx2 &defaultC @disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ:%&i2s_clki2s_hclkA",txrx2 &defaultC @disabledinterrupt-controller@fe600000 arm,gic-v3 `h a8^+'msi-controller@fe640000arm,gic-v3-itsd'kmsi-controller@fe660000arm,gic-v3-itsf'ppi-partitionsinterrupt-partition-0'interrupt-partition-1 'dma-controller@fea10000arm,pl330arm,primecell@ VW:n &apb_pclk'.dma-controller@fea30000arm,pl330arm,primecell@ XY:o &apb_pclk'i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c:{ &i2cpclk>default+ @disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c:| &i2cpclk?default+@okayrtc@51haoyu,hym8563Qhym8563 wdefaulti2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c:} &i2cpclk@default+ @disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c:~ &i2cpclkAdefault+ @disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c: &i2cpclkBdefault+ @disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !:TW &pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt:dc &tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF:&spiclkapb_pclk..txrx default+ @disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG:&spiclkapb_pclk..txrx default+ @disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH:&spiclkapb_pclktxrx default+@okayAQ pmic@0rockchip,rk806( wdefault8B@Jbnz  dvs1-null-pins gpio_pwrctrl1 pin_fun0'dvs2-null-pins gpio_pwrctrl2 pin_fun0'dvs3-null-pins gpio_pwrctrl3 pin_fun0'regulatorsdcdc-reg1 )vdd_gpu_s0 8 L ^ zdp ~ 0 # ''"regulator-state-mem dcdc-reg2 )vdd_npu_s0 8 L zdp ~ 0regulator-state-mem dcdc-reg3 )vdd_log_s0 8 L z L q 0regulator-state-mem  qdcdc-reg4 )vdd_vdenc_s0 8 L zdp ~ 0regulator-state-mem dcdc-reg5 )vdd_gpu_mem_s0 8 L ^ z L ~ 0 " ''#regulator-state-mem dcdc-reg6 )vdd_npu_mem_s0 8 L z L ~ 0regulator-state-mem dcdc-reg7 )vdd_2v0_pldo_s3 8 L z  0'regulator-state-mem ( dcdc-reg8 )vdd_vdenc_mem_s0 8 L z L ~ 0regulator-state-mem dcdc-reg9 )vdd2_ddr_s3 8 Lregulator-state-mem (dcdc-reg10 )vcc_1v1_nldo_s3 8 L z  0'regulator-state-mem ( pldo-reg1 )avcc_1v8_s0 8 L zw@ w@ 0regulator-state-mem pldo-reg2 )vdd1_1v8_ddr_s3 8 L zw@ w@ 0regulator-state-mem ( w@pldo-reg3 )avcc_1v8_codec_s0 8 L zw@ w@ 0'regulator-state-mem pldo-reg4 )vcc_3v3_s3 8 L z2Z 2Z 0'xregulator-state-mem ( 2Zpldo-reg5 )vccio_sd_s0 8 L zw@ 2Z 0'yregulator-state-mem pldo-reg6 )vcc_1v8_s3 8 L zw@ w@ 0regulator-state-mem ( w@nldo-reg1 )vdd_0v75_s3 8 L z q q 0regulator-state-mem ( qnldo-reg2 )vdd2l_0v9_ddr_s3 8 L z  regulator-state-mem ( nldo-reg3 )vdd_0v75_hdmi_edp_s0 8 L z q qregulator-state-mem nldo-reg4 )avdd_0v75_s0 8 L z q qregulator-state-mem nldo-reg5 )vdd_0v85_s0 8 L z P Pregulator-state-mem pmic@1rockchip,rk806( w default8B@bnz  dvs1-null-pins gpio_pwrctrl1 pin_fun0'dvs2-null-pins gpio_pwrctrl2 pin_fun0'dvs3-null-pins gpio_pwrctrl3 pin_fun0'regulatorsdcdc-reg1 )vdd_cpu_big1_s0 8 L  ' zdp  0'regulator-state-mem dcdc-reg2 )vdd_cpu_big0_s0 8 L  ' zdp  0'regulator-state-mem dcdc-reg3 )vdd_cpu_lit_s0 8 L  ' zdp ~ 0'regulator-state-mem dcdc-reg4 )vcc_3v3_s0 8 L z2Z 2Z 0'regulator-state-mem dcdc-reg5 )vdd_cpu_big1_mem_s0 8 L  ' z L  0'regulator-state-mem dcdc-reg6 )vdd_cpu_big0_mem_s0 8 L  ' z L  0'regulator-state-mem dcdc-reg7 )vcc_1v8_s0 8 L zw@ w@ 0'regulator-state-mem dcdc-reg8 )vdd_cpu_lit_mem_s0 8 L  ' z L ~ 0'regulator-state-mem dcdc-reg9 )vddq_ddr_s0 8 Lregulator-state-mem dcdc-reg10 )vdd_ddr_s0 8 L z L  0regulator-state-mem pldo-reg1 )vcc_1v8_cam_s0 8 L zw@ w@ 0regulator-state-mem pldo-reg2 )avdd1v8_ddr_pll_s0 8 L zw@ w@ 0regulator-state-mem pldo-reg3 )vdd_1v8_pll_s0 8 L zw@ w@ 0regulator-state-mem pldo-reg4 )vcc_3v3_sd_s0 8 L z2Z 2Z 0regulator-state-mem pldo-reg5 )vcc_2v8_cam_s0 8 L z* * 0regulator-state-mem pldo-reg6 )pldo6_s3 8 L zw@ w@regulator-state-mem ( w@nldo-reg1 )vdd_0v75_pll_s0 8 L z q q 0regulator-state-mem nldo-reg2 )vdd_ddr_pll_s0 8 L z P Pregulator-state-mem nldo-reg3 )avdd_0v85_s0 8 L z P P 0regulator-state-mem nldo-reg4 )avdd_1v2_cam_s0 8 L zO O 0regulator-state-mem nldo-reg5 )avdd_1v2_s0 8 L zO O 0regulator-state-mem spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI:&spiclkapb_pclktxrx default+ @disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL:&baudclkapb_pclk.. txrxdefault @disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM:&baudclkapb_pclk. . txrxdefault@okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN:&baudclkapb_pclk. . txrxdefault @disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO:&baudclkapb_pclk txrxdefault @disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP:&baudclkapb_pclk txrxdefault @disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ:&baudclkapb_pclk txrxdefault @disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR:&baudclkapb_pclkhhtxrxdefault @disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS:&baudclkapb_pclkh h txrxdefault @disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT:&baudclkapb_pclkh h txrxdefault @disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:LK &pwmpclkdefault @disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:LK &pwmpclkdefault @disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :LK &pwmpclkdefault @disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:LK &pwmpclkdefault @disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:ON &pwmpclkdefault @disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:ON &pwmpclkdefault @disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :ON &pwmpclkdefault @disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:ON &pwmpclkdefault @disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ &pwmpclkdefault @disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ &pwmpclkdefault @disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :RQ &pwmpclkdefault @disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:RQ &pwmpclkdefault @disabledthermal-zonespackage-thermal @ V dtripspackage-crit t8  criticalbigcore0-thermal @d V dtripsbigcore0-alert tL passive'bigcore0-crit t8  criticalcooling-mapsmap0  bigcore2-thermal @d V dtripsbigcore2-alert tL passive'bigcore2-crit t8  criticalcooling-mapsmap0   littlecore-thermal @d V dtripslittlecore-alert tL passive'littlecore-crit t8  criticalcooling-mapsmap0 0 center-thermal @ V dtripscenter-crit t8  criticalgpu-thermal @d V dtripsgpu-alert tL passive'gpu-crit t8  criticalcooling-mapsmap0  npu-thermal @ V dtripsnpu-crit t8  criticaltsadc@fec00000rockchip,rk3588-tsadc:&tsadcapb_pclkAQVWYtsadc-apbtsadc     gpiootpout @okay'adc@fec10000rockchip,rk3588-saradc :&saradcapb_pclkU Ysaradc-apb@okay 'i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c: &i2cpclkCdefault+ @disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c: &i2cpclkDdefault+@okayaudio-codec@11everest,es8388A1Q:1&mclk & 2 > ?C'i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c: &i2cpclkEdefault+ @disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ:&spiclkapb_pclkh htxrx default+ @disabledefuse@fecc0000rockchip,rk3588-otp :&otpapb_pclkphyarb Yotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c Knpu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[:p &apb_pclk'hphy@fed60000rockchip,rk3588-hdptx-phy :T&refapbe8#cde!""Yphyapbinitcmnlaneroplllcpll{ @disabledphy@fed80000rockchip,rk3588-usbdp-phye:lV&refclkimmortalpclkutmi(   Yinitcmnlanepcs_apbpma_apb P c t  @disabled'%phy@fee00000rockchip,rk3588-naneng-combphy:vW &refapbpipeAQe<CYphyapb , @okay'ophy@fee20000rockchip,rk3588-naneng-combphy:xW &refapbpipeAQe>EYphyapb , @okay'*sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrl{+'gpio@fd8a0000rockchip,gpio-bank:qr( ^'wgpio@fec20000rockchip,gpio-bank:st( ^'gpio@fec30000rockchip,gpio-bank:uv( @ ^gpio@fec40000rockchip,gpio-bank:wx( ` ^' gpio@fec50000rockchip,gpio-bank:yz( ^'mpcfg-pull-up 'pcfg-pull-down 'pcfg-pull-none 'pcfg-pull-none-drv-level-2  'pcfg-pull-up-drv-level-1  'pcfg-pull-up-drv-level-2  'pcfg-pull-none-smt  'auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout '{emmc-bus8 '|emmc-clk '}emmc-cmd '~emmc-data-strobe 'eth1fspigmac1gpuhdmii2c0i2c0m0-xfer  '-i2c1i2c1m0-xfer   'i2c2i2c2m0-xfer   'i2c3i2c3m0-xfer   'i2c4i2c4m0-xfer   'i2c5i2c5m0-xfer   'i2c6i2c6m0-xfer   'i2c7i2c7m0-xfer   'i2c8i2c8m0-xfer   'i2s0i2s0-lrck 'i2s0-mclk 'i2s0-sclk 'i2s0-sdi0 'i2s0-sdo0 'i2s1i2s1m0-lrck 'i2s1m0-sclk 'i2s1m0-sdi0 'i2s1m0-sdi1 'i2s1m0-sdi2 'i2s1m0-sdi3 'i2s1m0-sdo0  'i2s1m0-sdo1  'i2s1m0-sdo2  'i2s1m0-sdo3  'i2s2i2s2m1-lrck 'i2s2m1-sclk  'i2s2m1-sdi  'i2s2m1-sdo  'i2s3i2s3-lrck 'i2s3-sclk 'i2s3-sdi 'i2s3-sdo 'jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp 'pmupwm0pwm0m0-pins '0pwm1pwm1m0-pins '1pwm2pwm2m0-pins '2pwm3pwm3m0-pins '3pwm4pwm4m0-pins  'pwm5pwm5m0-pins  'pwm6pwm6m0-pins  'pwm7pwm7m0-pins  'pwm8pwm8m0-pins  'pwm9pwm9m0-pins  'pwm10pwm10m0-pins  'pwm11pwm11m0-pins  'pwm12pwm12m0-pins  'pwm13pwm13m0-pins  'pwm14pwm14m0-pins  'pwm15pwm15m0-pins  'refclksatasata0sata1sata2sdiosdiom1-pins` 'zsdmmcsdmmc-bus4@ 'vsdmmc-clk 'ssdmmc-cmd 'tsdmmc-det 'uspdif0spdif1spi0spi0m0-pins0 'spi0m0-cs0 'spi0m0-cs1 'spi1spi1m1-pins0 'spi1m1-cs0 'spi1m1-cs1 'spi2spi2m2-pins0  'spi2m2-cs0  'spi2m2-cs1 'spi3spi3m1-pins0  'spi3m1-cs0 'spi3m1-cs1 'spi4spi4m0-pins0 'spi4m0-cs0 'spi4m0-cs1 'tsadctsadc-shut 'uart0uart0m1-xfer  '/uart1uart1m1-xfer   'uart2uart2m0-xfer  'uart3uart3m1-xfer   'uart4uart4m1-xfer   'uart5uart5m1-xfer   'uart6uart6m1-xfer   'uart7uart7m1-xfer   'uart8uart8m1-xfer   'uart9uart9m1-xfer   'vopbt656gpio-functsadc-gpio-func 'eth0gmac0gmac0-miim 'gmac0-rx-bus20 'gmac0-tx-bus20 'gmac0-rgmii-clk  'gmac0-rgmii-bus@   'hym8563hym8563-int 'ledsled-pins ' rtl8111rtl8111-isolate 'lrtl8211frtl8211f-rst  'soundhp-detect ' usbvcc5v0-host-en 'usb@fc400000rockchip,rk3588-dwc3snps,dwc3@@:&ref_clksuspend_clkbus_clk_otg glusb2-phyusb3-phy vutmi_wide2 S @disabledsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon['syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\'syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon\@'syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@@+'usb2phy@4000rockchip,rk3588-usb2phy@:&phyclk usb480m_phy1nYphyapb @disabled'otg-porte @disabled'i2s@fddc8000rockchip,rk3588-i2s-tdm܀:&mclk_txmclk_rxhclkA,htx2 Ytx-mC @disabledi2s@fddf4000rockchip,rk3588-i2s-tdm@:99?&mclk_txmclk_rxhclkA6,htx2 Ytx-mC @disabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀:++'&mclk_txmclk_rxhclkA(,hrx2 Yrx-mC @disabledi2s@fde00000rockchip,rk3588-i2s-tdm:&&"&mclk_txmclk_rxhclkA#,hrx2 Yrx-mC @disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+T0:@E;JOt)&aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr^o`g lpcie-phy2 "T @ @0 @@dbiapbconfig&+ Ypwrpipe@okay m )legacy-interrupt-controller^ 'pcie-ep@fe150000rockchip,rk3588-pcie-epP @ @ @ @0dbidbi2apbaddr_spaceatu0:@E;JOt)&aclk_mstaclk_slvaclk_dbipclkauxpipe +syspmcmsglegacyerrdma0dma1dma2dma3g lpcie-phy2 "&+ Ypwrpipe @disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+T0:AF<KPu)&aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr^o`g lpcie-phy2 "T @ @@0 @@@dbiapbconfig', Ypwrpipe @disabledlegacy-interrupt-controller^ 'pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcieT /0:BG=LQ)&aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr^o` k g lpcie-phy2 "T @ @0 @@dbiapbconfig(- Ypwrpipe+@okay m )legacy-interrupt-controller^ 'ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(:67X]40&stmmacethclk_mac_refpclk_macaclk_macptp_ref2 !# Ystmmaceth{d,(;@okay 9output F Qrgmii-rxiddefault Z cCmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916default lN  | m 'stmmac-axi-configDN^'rx-queues-confign'queue0queue1tx-queues-config'queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(:c`fUp&satapmaliverxoobrefasic+ @disabledsata-port@0@g lsata-phy  phy@fed90000rockchip,rk3588-usbdp-phye:mW&refclkimmortalpclkutmi(Yinitcmnlanepcs_apbpma_apb P c t  @disabled'phy@fee10000rockchip,rk3588-naneng-combphy:wW &refapbpipeAQe=DYphyapb , @okay'phy@fee80000rockchip,rk3588-pcie3-phye:y&pclkHYphy , @okay'opp-table-cluster0operating-points-v2 ' opp-1008000000 < L L~ @opp-1200000000 G 4 4~ @opp-1416000000 Tfr ~ @ opp-1608000000 _" P P~ @opp-1800000000 kI ~~~ @opp-table-cluster1operating-points-v2 'opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-cluster2operating-points-v2 'opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-tableoperating-points-v2'!opp-300000000  L L Popp-400000000 ׄ L L Popp-500000000 e L L Popp-600000000 #F L L Popp-700000000 )' ` ` Popp-800000000 / q q Popp-900000000 5 5 5 Popp-1000000000 ; P P Pchosen serial2:1500000n8adc-keys-0 adc-keys  buttons w@ dbutton-maskrom -Mask Rom 3 >adc-keys-1 adc-keys  buttons w@ dbutton-volume-up -V+/REC 3s >Ebutton-volume-down -V- 3r >Vbutton-menu -MENU 3 > button-esc -ESC 3 >*audio-amplifier-headphonesimple-audio-amplifier X eHeadphones Amp' audio-amplifier-speakersimple-audio-amplifier X eSpeaker Amp' leds gpio-ledsdefault led-1 w  indicator  soundsimple-audio-carddefault  }Analog    i2s  "^AMicrophoneOnboard MicrophoneMicrophoneMicrophone JackSpeakerSpeakerHeadphoneHeadphonesr[HeadphonesLOUT1HeadphonesROUT1SpeakerLOUT2SpeakerROUT2HeadphonesHeadphones Amp OUTLHeadphonesHeadphones Amp OUTRHeadphones Amp INLLOUT1Headphones Amp INRROUT1SpeakerSpeaker Amp OUTLSpeakerSpeaker Amp OUTRSpeaker Amp INLLOUT2Speaker Amp INRROUT2LINPUT1Microphone JackRINPUT1Microphone JackLINPUT2Onboard MicrophoneRINPUT2Onboard Microphonesimple-audio-card,cpuu'simple-audio-card,codecuvcc12v-dcin-regulatorregulator-fixed )vcc12v_dcin 8 L z 'vcc3v3-bt-regulatorregulator-fixed   )vcc3v3_bt z2Z 2ZPvcc3v3-pcie30-regulatorregulator-fixed   )vcc3v3_pcie30 z2Z 2Z'vcc3v3-wf-regulatorregulator-fixed   )vcc3v3_wf z2Z 2ZP'vcc4v0-sys-regulatorregulator-fixed )vcc4v0_sys 8 L z=  = 'vcc5v0-host-regulatorregulator-fixed mdefault )vcc5v0_host 8 L zLK@ LK@'+vcc5v0-usb-regulatorregulator-fixed )vcc5v0_usb 8 L zLK@ LK@' compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplysram-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesdmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeedcd-gpiosdisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellswakeup-sourcenum-cs#gpio-cellsgpio-controllerspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-nameregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-coupled-withregulator-coupled-max-spreadregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsvpcie3v3-supplyclock_in_outphy-handlephy-moderx_delaytx_delayreset-assert-usreset-deassert-usrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltenable-gpiossound-name-prefixcolorsimple-audio-card,namesimple-audio-card,aux-devssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,hp-det-gpiosimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-daisystem-clock-frequencyenable-active-highstartup-delay-usvin-supply