K8=t(u=<9tsd,rk3588-tiger-haikoutsd,rk3588-tigerrockchip,rk3588 +17Theobroma Systems RK3588-Q7 SoM on Haikou devkitaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/i2c@fec80000/rtc@6f/ethernet@fe1b0000/mmc@fe2c0000cpus+cpu-mapcluster0core0 core1 core2 core3 cluster1core0 core1 cluster2core0 core1 cpu@0cpuarm,cortex-a55psci,? F V0,k {@@  !,cpu@100cpuarm,cortex-a55psci,? k {@@ !,cpu@200cpuarm,cortex-a55psci,? k {@@ !,cpu@300cpuarm,cortex-a55psci,? k {@@ !,cpu@400cpuarm,cortex-a76psci,? F V0,k {@@ !,cpu@500cpuarm,cortex-a76psci,? k {@@ !,cpu@600cpuarm,cortex-a76psci,? F V0,k {@@ !,cpu@700cpuarm,cortex-a76psci,? k {@@ !, idle-states4pscicpu-sleeparm,idle-stateARidzx, l2-cache-l0cache}@, l2-cache-l1cache}@,l2-cache-l2cache}@,l2-cache-l3cache}@,l2-cache-b0cache}@,l2-cache-b1cache}@,l2-cache-b2cache}@,l2-cache-b3cache}@,l3-cachecache}0@,display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tz%smcscmi arm,scmi-smc+protocol@14, protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0%smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram$+sram@0arm,scmi-shmem,gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf F V ?+corecoregroupstacks 0\]^ jobmmugpu7 Eokay !L",usb@fc000000rockchip,rk3588-dwc3snps,dwc3@?+ref_clksuspend_clkbus_clkXotg `#$eusb2-phyusb3-phy outmi_wide7 xR Eokay+%usb@fc800000"rockchip,rk3588-ehcigeneric-ehci?&`'eusb7 Eokayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci?&`'eusb7 Eokayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci?(`)eusb7 Eokayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci?(`)eusb7 Eokayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(?jihkr&+ref_clksuspend_clkbus_clkutmipipeXhost`* eusb3-phy outmi_widex4 2Eokayiommu@fc900000 arm,smmu-v3 @qsvoeventqgerrorpriqcmdq-syncL Edisablediommu@fcb00000 arm,smmu-v3 @}{eventqgerrorpriqcmdq-syncL Edisabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX,isyscon@fd58c000rockchip,rk3588-sys-grfsysconX,dsyscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ ,esyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` ?,syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@?,fsyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@,syscon@fd5b0000rockchip,rk3588-php-grfsyscon[,,syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[,syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@,syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@,syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+,usb2phy@0rockchip,rk3588-usb2phy?+phyclk usb480m_phy0xmYphyapbEokay,otg-porteEokayp+,#syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy?+phyclk usb480m_phy2xoYphyapbEokay,&host-porteEokay,'syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy?+phyclk usb480m_phy3xp YphyapbEokay,(host-porteEokay,)syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^,syscon@fd5f0000rockchip,rk3588-iocsyscon_,sram@fd600000 mmio-sram`$`+clock-controller@fd7c0000rockchip,rk3588-cru|F]q@VA.2Fq)׫ׄe/ׄ eZ р {,,i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=?ts +i2cpclk-default+ Edisabledserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK?+baudclkapb_pclk..txrx/default Edisabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm? +pwmpclk0default Edisabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm? +pwmpclk1default Edisabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ? +pwmpclk2default Edisabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0? +pwmpclk3default Edisabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd,gpower-controller!rockchip,rk3588-power-controller+Eokay, power-domain@8+power-domain@9  ?!#" 456+power-domain@10 ?!#"7power-domain@11 ?!#"8power-domain@12 ?9:;<power-domain@13 +power-domain@14(?=power-domain@15 ?>power-domain@16? ?@A+power-domain@17 ? BCDpower-domain@21? EFGHIJKL+power-domain@23?CAMpower-domain@14 ?=power-domain@15?>power-domain@22?Npower-domain@24?[Z]OP+power-domain@258?ZQpower-domain@268?QRSpower-domain@270?TUVW+power-domain@28 ?XYpower-domain@29(?Z[power-domain@30?z{\power-domain@31@?W]^_`power-domain@33!?WZ[power-domain@34"?WZ[power-domain@37%?2apower-domain@38&?45power-domain@40(bvideo-codec@fdc70000rockchip,rk3588-av1-vpulvdpuFACVׄׄ?AC +aclkhclk7  xvop@fdd90000rockchip,rk3588-vop BPvopgamma-lut8?]\abcd[7+aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vopc7 {defg Edisabledports+,port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~?]\ +aclkifaceL7  Edisabled,ci2s@fddc0000rockchip,rk3588-i2s-tdm?+mclk_txmclk_rxhclkF,htx7 xYtx-mC Edisabledi2s@fddf0000rockchip,rk3588-i2s-tdm?445+mclk_txmclk_rxhclkF1,htx7 xYtx-mC Edisabledi2s@fddfc000rockchip,rk3588-i2s-tdm?00,+mclk_txmclk_rxhclkF-,hrx7 xYrx-mC Edisabledqos@fdf35000rockchip,rk3588-qossysconP ,9qos@fdf35200rockchip,rk3588-qossysconR ,:qos@fdf35400rockchip,rk3588-qossysconT ,;qos@fdf35600rockchip,rk3588-qossysconV ,<qos@fdf36000rockchip,rk3588-qossyscon` ,\qos@fdf39000rockchip,rk3588-qossyscon ,aqos@fdf3d800rockchip,rk3588-qossyscon ,bqos@fdf3e000rockchip,rk3588-qossyscon ,^qos@fdf3e200rockchip,rk3588-qossyscon ,]qos@fdf3e400rockchip,rk3588-qossyscon ,_qos@fdf3e600rockchip,rk3588-qossyscon ,`qos@fdf40000rockchip,rk3588-qossyscon ,Zqos@fdf40200rockchip,rk3588-qossyscon ,[qos@fdf40400rockchip,rk3588-qossyscon ,Tqos@fdf40500rockchip,rk3588-qossyscon ,Uqos@fdf40600rockchip,rk3588-qossyscon ,Vqos@fdf40800rockchip,rk3588-qossyscon ,Wqos@fdf41000rockchip,rk3588-qossyscon ,Xqos@fdf41100rockchip,rk3588-qossyscon ,Yqos@fdf60000rockchip,rk3588-qossyscon ,?qos@fdf60200rockchip,rk3588-qossyscon ,@qos@fdf60400rockchip,rk3588-qossyscon ,Aqos@fdf61000rockchip,rk3588-qossyscon ,Bqos@fdf61200rockchip,rk3588-qossyscon ,Cqos@fdf61400rockchip,rk3588-qossyscon ,Dqos@fdf62000rockchip,rk3588-qossyscon ,=qos@fdf63000rockchip,rk3588-qossyscon0 ,>qos@fdf64000rockchip,rk3588-qossyscon@ ,Mqos@fdf66000rockchip,rk3588-qossyscon` ,Eqos@fdf66200rockchip,rk3588-qossysconb ,Fqos@fdf66400rockchip,rk3588-qossyscond ,Gqos@fdf66600rockchip,rk3588-qossysconf ,Hqos@fdf66800rockchip,rk3588-qossysconh ,Iqos@fdf66a00rockchip,rk3588-qossysconj ,Jqos@fdf66c00rockchip,rk3588-qossysconl ,Kqos@fdf66e00rockchip,rk3588-qossysconn ,Lqos@fdf67000rockchip,rk3588-qossysconp ,Nqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon ,7qos@fdf71000rockchip,rk3588-qossyscon ,8qos@fdf72000rockchip,rk3588-qossyscon ,4qos@fdf72200rockchip,rk3588-qossyscon" ,5qos@fdf72400rockchip,rk3588-qossyscon$ ,6qos@fdf80000rockchip,rk3588-qossyscon ,Qqos@fdf81000rockchip,rk3588-qossyscon ,Rqos@fdf81200rockchip,rk3588-qossyscon ,Sqos@fdf82000rockchip,rk3588-qossyscon ,Oqos@fdf82200rockchip,rk3588-qossyscon" ,Pdfi@fe060000rockchip,rk3588-dfi@&0:ipcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcieT0?0?CH>MR)+aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr^o`jjjj0k0`* epcie-phy7 "T$ @ @0 @@dbiapbconfigx). Ypwrpipe+ Edisabledlegacy-interrupt-controller^ ,jpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcieT@O0?DI?NSs)+aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr^o`llll@k@`m epcie-phy7 "T$ @ @0 A@dbiapbconfigx*/ Ypwrpipe+ Edisabledlegacy-interrupt-controller^ ,lethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(?67Y^50+stmmacethclk_mac_refpclk_macaclk_macptp_ref7 !x$ Ystmmaceth{d,n op/ Edisabledmdiosnps,dwmac-mdio+stmmac-axi-config8BR,nrx-queues-configb,oqueue0queue1tx-queues-configx,pqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(?b_eTo+satapmaliverxoobrefasic+ Edisabledsata-port@0@`m esata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(?dagVq+satapmaliverxoobrefasic+ Edisabledsata-port@0@`* esata-phy  spi@fe2b0000 rockchip,sfc+@?/0+clk_sfchclk_sfc+ Edisabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ ?  +biuciuciu-driveciu-sampleрdefault qrs7 (Eokayt  u -:GUvmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ ?+biuciuciu-driveciu-sample defaultw7 % Edisabledmmc@fe2e0000rockchip,rk3588-dwcmshc.F-., V n6 (?,*+-.+corebusaxiblocktimer xyz{default(xYcorebusaxiblocktimerEokayas|U}~i2s@fe470000rockchip,rk3588-i2s-tdmG?+/(+mclk_txmclk_rxhclkF)-,..txrx7 &x*+ Ytx-mrx-mdefault(C Edisabledi2s@fe480000rockchip,rk3588-i2s-tdmH?y}u+mclk_txmclk_rxhclk..txrxx^_ Ytx-mrx-mdefault(C Edisabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI?+i2s_clki2s_hclkF,txrx7 &defaultC Edisabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ?%+i2s_clki2s_hclkF",txrx7 &defaultCEokay,interrupt-controller@fe600000 arm,gic-v3 `h a8$^+,msi-controller@fe640000arm,gic-v3-itsd+,kmsi-controller@fe660000arm,gic-v3-itsf+,ppi-partitionsinterrupt-partition-06,interrupt-partition-16 ,dma-controller@fea10000arm,pl330arm,primecell@ VW??n +apb_pclkV,.dma-controller@fea30000arm,pl330arm,primecell@ XY??o +apb_pclkV,i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c?{ +i2cpclk>default+Eokayeeprom@50P atmel,24c01ajvi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c?| +i2cpclk?default+Eokayi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c?} +i2cpclk@default+ Edisabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c?~ +i2cpclkAdefault+Eokayregulator@42rockchip,rk8602Bu vdd_npu_s0dp~ regulator-state-mem i2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c? +i2cpclkBdefault+Eokaycodec@a fsl,sgtl5000 ?C 0 <v I,timer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !?TW +pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt?dc +tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF?+spiclkapb_pclk..txrx U default+ Edisabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG?+spiclkapb_pclk..txrx U default+ Edisabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH?+spiclkapb_pclktxrx Udefault+EokayFV pmic@0rockchip,rk806 u \ ldefault xB@             ( 5 B Odvs1-null-pins [gpio_pwrctrl1 `pin_fun0,dvs2-null-pins [gpio_pwrctrl2 `pin_fun0,dvs3-null-pins [gpio_pwrctrl3 `pin_fun0,regulatorsdcdc-reg1dp~0 vdd_gpu_s0 i,"regulator-state-mem dcdc-reg2vdd_cpu_lit_s0dp~0,regulator-state-mem dcdc-reg3 vdd_log_s0 L q0regulator-state-mem  qdcdc-reg4 vdd_vdenc_s0dp~0regulator-state-mem dcdc-reg5 vdd_ddr_s0 L 0regulator-state-mem  Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg7vcc_2v0_pldo_s30,regulator-state-mem  dcdc-reg8 vcc_3v3_s32Z2Z,}regulator-state-mem  2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem dcdc-reg10 vcc_1v8_s3w@w@,~regulator-state-mem  w@pldo-reg1 vcca_1v8_s0w@w@regulator-state-mem pldo-reg2 vcc_1v8_s0w@w@,regulator-state-mem  w@pldo-reg3 vdda_1v2_s0OOregulator-state-mem pldo-reg4 vcca_3v3_s02Z2Z0regulator-state-mem pldo-reg5 vccio_sd_s0w@2Z0,tregulator-state-mem pldo-reg6 pldo6_s3w@w@regulator-state-mem  w@nldo-reg1 vdd_0v75_s3 q qregulator-state-mem  qnldo-reg2vdda_ddr_pll_s0 P Pregulator-state-mem  Pnldo-reg3 vdda_0v75_s0 q qregulator-state-mem nldo-reg4 vdda_0v85_s0 P Pregulator-state-mem nldo-reg5 vdd_0v75_s0 q qregulator-state-mem spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI?+spiclkapb_pclktxrx U default+ Edisabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL?+baudclkapb_pclk.. txrxdefault Edisabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM?+baudclkapb_pclk. . txrxdefaultEokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN?+baudclkapb_pclk. . txrxdefault Edisabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO?+baudclkapb_pclk txrxdefaultEokayserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP?+baudclkapb_pclk txrxdefault Edisabled serial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ?+baudclkapb_pclk txrxdefault Edisabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR?+baudclkapb_pclkhhtxrxdefault Edisabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS?+baudclkapb_pclkh h txrxdefault Edisabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT?+baudclkapb_pclkh h txrxdefault Edisabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm?LK +pwmpclkdefault Edisabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm?LK +pwmpclkdefault Edisabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ?LK +pwmpclkdefault Edisabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0?LK +pwmpclkdefault Edisabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm?ON +pwmpclkdefault Edisabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm?ON +pwmpclkdefault Edisabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ?ON +pwmpclkdefault Edisabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0?ON +pwmpclkdefault Edisabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm?RQ +pwmpclkdefault Edisabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm?RQ +pwmpclkdefault Edisabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm ?RQ +pwmpclkdefault Edisabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0?RQ +pwmpclkdefault Edisabledthermal-zonespackage-thermal   tripspackage-crit 8  criticalbigcore0-thermal d  tripsbigcore0-alert L passive,bigcore0-crit 8  criticalcooling-mapsmap0  bigcore2-thermal d  tripsbigcore2-alert L passive,bigcore2-crit 8  criticalcooling-mapsmap0   littlecore-thermal d  tripslittlecore-alert L passive,littlecore-crit 8  criticalcooling-mapsmap0 0 center-thermal   tripscenter-crit 8  criticalgpu-thermal d  tripsgpu-alert L passive,gpu-crit 8  criticalcooling-mapsmap0  npu-thermal   tripsnpu-crit 8  criticaltsadc@fec00000rockchip,rk3588-tsadc?+tsadcapb_pclkFVxVWYtsadc-apbtsadc " 9 P k gpiootpout uEokay,adc@fec10000rockchip,rk3588-saradc ?+saradcapb_pclkxU Ysaradc-apbEokay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c? +i2cpclkCdefault+Eokayfan@18 ti,amc6821rtc@6f isil,isl1208oi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c? +i2cpclkDdefault+Eokayregulator@42rockchip,rk8602Buvdd_cpu_big0_s0dp ,regulator-state-mem regulator@43 rockchip,rk8603rockchip,rk8602Cuvdd_cpu_big1_s0dp ,regulator-state-mem i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c? +i2cpclkEdefault+Eokayspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ?+spiclkapb_pclkh htxrx U default+ Edisabledefuse@fecc0000rockchip,rk3588-otp ?+otpapb_pclkphyarbx Yotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[??p +apb_pclkV,hphy@fed60000rockchip,rk3588-hdptx-phy ?T+refapbe8x#cde!""Yphyapbinitcmnlaneroplllcpll{ Edisabledphy@fed80000rockchip,rk3588-usbdp-phye?lV+refclkimmortalpclkutmi(x   Yinitcmnlanepcs_apbpma_apb    Eokay,$phy@fee00000rockchip,rk3588-naneng-combphy?vW +refapbpipeFVex<CYphyapb ,  Edisabled,mphy@fee20000rockchip,rk3588-naneng-combphy?xW +refapbpipeFVex>EYphyapb , Eokay,*sram@ff001000 mmio-sram$+pinctrlrockchip,rk3588-pinctrl${+,gpio@fd8a0000rockchip,gpio-bank?qr \  l^,ugpio@fec20000rockchip,gpio-bank?st \  l^, gpio@fec30000rockchip,gpio-bank?uv \ @  l^, gpio@fec40000rockchip,gpio-bank?wx \ `  l^,gpio@fec50000rockchip,gpio-bank?yz \  l^,pcfg-pull-up ,,pcfg-pull-down 9,pcfg-pull-none H,pcfg-pull-none-drv-level-0 H U,pcfg-pull-none-drv-level-2 H U,pcfg-pull-up-drv-level-1 , U,pcfg-pull-up-drv-level-2 , U,pcfg-pull-none-smt H d,auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-bus8 y,xemmc-clk y,zemmc-cmd y,yemmc-data-strobe y,{emmc-reset y,eth1fspigmac1gpuhdmii2c0i2c0m0-xfer y ,-i2c1i2c1m0-xfer y  ,i2c2i2c2m3-xfer y  ,i2c3i2c3m0-xfer y  ,i2c4i2c4m4-xfer y  ,i2c5i2c5m1-xfer y  ,i2c6i2c6m0-xfer y  ,i2c7i2c7m0-xfer y  ,i2c8i2c8m2-xfer y  ,i2s0i2s0-lrck y,i2s0-sclk y,i2s0-sdi0 y,i2s0-sdi1 y,i2s0-sdi2 y,i2s0-sdi3 y,i2s0-sdo0 y,i2s0-sdo1 y,i2s0-sdo2 y,i2s0-sdo3 y,i2s1i2s1m0-lrck y,i2s1m0-sclk y,i2s1m0-sdi0 y,i2s1m0-sdi1 y,i2s1m0-sdi2 y,i2s1m0-sdi3 y,i2s1m0-sdo0 y ,i2s1m0-sdo1 y ,i2s1m0-sdo2 y ,i2s1m0-sdo3 y ,i2s2i2s2m1-lrck y,i2s2m1-sclk y ,i2s2m1-sdi y ,i2s2m1-sdo y ,i2s3i2s3-lrck y,i2s3-sclk y,i2s3-sdi y,i2s3-sdo y,jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp y,pmupwm0pwm0m1-pins y ,0pwm1pwm1m0-pins y,1pwm2pwm2m0-pins y,2pwm3pwm3m0-pins y,3pwm4pwm4m0-pins y ,pwm5pwm5m0-pins y ,pwm6pwm6m0-pins y ,pwm7pwm7m0-pins y ,pwm8pwm8m0-pins y ,pwm9pwm9m0-pins y ,pwm10pwm10m0-pins y ,pwm11pwm11m0-pins y ,pwm12pwm12m0-pins y ,pwm13pwm13m0-pins y ,pwm14pwm14m0-pins y ,pwm15pwm15m0-pins y ,refclksatasata0sata1sata2sdiosdiom1-pins` y,wsdmmcsdmmc-bus4@ y,qsdmmc-clk y,ssdmmc-cmd y,rspdif0spdif1spi0spi0m1-cs0 y ,spi0m1-cs1 y ,spi0m3-pins0 y,spi1spi1m1-pins0 y,spi1m1-cs0 y,spi1m1-cs1 y,spi2spi2m2-pins0 y ,spi2m2-cs0 y ,spi3spi3m1-pins0 y ,spi3m1-cs0 y,spi3m1-cs1 y,spi4spi4m0-pins0 y,spi4m0-cs0 y,spi4m0-cs1 y,tsadctsadc-shut y,uart0uart0m1-xfer y ,/uart1uart1m1-xfer y  ,uart2uart2m2-xfer y  ,uart3uart3m1-xfer y  ,uart4uart4m2-xfer y  ,uart5uart5m1-xfer y  ,uart6uart6m1-xfer y  ,uart7uart7m1-xfer y  ,uart8uart8m1-xfer y  ,uart9uart9m1-xfer y  ,vopbt656gpio-functsadc-gpio-func y,eth0eth0-pins y,gmac0gmac0-miim y,gmac0-rx-bus20 y,gmac0-tx-bus20 y,gmac0-rgmii-clk y ,gmac0-rgmii-bus@ y  ,etherneteth-reset y,ledsmodule-led-pin y, usb3usb3-id y, haikouhaikou-keys-pin@ y  ,usb2otg-vbus-drv y ,usb@fc400000rockchip,rk3588-dwc3snps,dwc3@@?+ref_clksuspend_clkbus_clkXhost `eusb2-phyusb3-phy outmi_wide7 xS Eokaysyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon[,syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\,syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon\@,syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@@+,usb2phy@4000rockchip,rk3588-usb2phy@?+phyclk usb480m_phy1xnYphyapbEokay,otg-porteEokay,i2s@fddc8000rockchip,rk3588-i2s-tdm܀?+mclk_txmclk_rxhclkF,htx7 xYtx-mC Edisabledi2s@fddf4000rockchip,rk3588-i2s-tdm@?99?+mclk_txmclk_rxhclkF6,htx7 xYtx-mC Edisabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀?++'+mclk_txmclk_rxhclkF(,hrx7 xYrx-mC Edisabledi2s@fde00000rockchip,rk3588-i2s-tdm?&&"+mclk_txmclk_rxhclkF#,hrx7 xYrx-mC Edisabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+T4?@E;JOt-+aclk_mstaclk_slvaclk_dbipclkauxpiperefpciPsyspmcmsglegacyerr^o`` epcie-phy7 "T$ @ @0 @@dbiapbconfigx&+ YpwrpipeEokay  vlegacy-interrupt-controller^ ,pcie-ep@fe150000rockchip,rk3588-pcie-epP @ @ @ @0dbidbi2apbaddr_spaceatu0?@E;JOt)+aclk_mstaclk_slvaclk_dbipclkauxpipe +syspmcmsglegacyerrdma0dma1dma2dma3` epcie-phy7 "x&+ Ypwrpipe Edisabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+T0?AF<KPu)+aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr^o`` epcie-phy7 "T$ @ @@0 @@@dbiapbconfigx', Ypwrpipe Edisabledlegacy-interrupt-controller^ ,pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcieT /0?BG=LQ)+aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr^o` k ` epcie-phy7 "T$ @ @0 @@dbiapbconfigx(- Ypwrpipe+ Edisabledlegacy-interrupt-controller^ ,ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(?67X]40+stmmacethclk_mac_refpclk_macaclk_macptp_ref7 !x# Ystmmaceth{d, /Eokay output  rgmiipdefault     'mdiosnps,dwmac-mdio+ethernet-phy@6ethernet-phy-ieee802.3-c22?,stmmac-axi-config8BR,rx-queues-configb,queue0queue1tx-queues-configx,queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(?c`fUp+satapmaliverxoobrefasic+ Edisabledsata-port@0@` esata-phy  phy@fed90000rockchip,rk3588-usbdp-phye?mW+refclkimmortalpclkutmi(xYinitcmnlanepcs_apbpma_apb    Eokay,phy@fee10000rockchip,rk3588-naneng-combphy?wW +refapbpipeFVex=DYphyapb ,  Edisabled,phy@fee80000rockchip,rk3588-pcie3-phye?y+pclkxHYphy , Eokay,opp-table-cluster0operating-points-v2 ", opp-1008000000 -< 4 L L~ B@opp-1200000000 -G 4 4 4~ B@opp-1416000000 -Tfr 4 ~ B@ Sopp-1608000000 -_" 4 P P~ B@opp-1800000000 -kI 4~~~ B@opp-table-cluster1operating-points-v2 ",opp-1200000000 -G 4 L LB@ B@opp-1416000000 -Tfr 4  B@ B@opp-1608000000 -_" 4 B@ B@opp-1800000000 -kI 4 P PB@ B@opp-2016000000 -x) 4HHB@ B@opp-2208000000 -h 4llB@ B@opp-2400000000 -  4B@B@B@ B@opp-table-cluster2operating-points-v2 ",opp-1200000000 -G 4 L LB@ B@opp-1416000000 -Tfr 4  B@ B@opp-1608000000 -_" 4 B@ B@opp-1800000000 -kI 4 P PB@ B@opp-2016000000 -x) 4HHB@ B@opp-2208000000 -h 4llB@ B@opp-2400000000 -  4B@B@B@ B@opp-tableoperating-points-v2,!opp-300000000 - 4 L L Popp-400000000 -ׄ 4 L L Popp-500000000 -e 4 L L Popp-600000000 -#F 4 L L Popp-700000000 -)' 4 ` ` Popp-800000000 -/ 4 q q Popp-900000000 -5 4 5 5 Popp-1000000000 -; 4 P P Pemmc-pwrseqmmc-pwrseq-emmcdefault  ,|extcon-usb3linux,extcon-usb-gpio _default Eokay,%leds gpio-ledsdefault led-1   `heartbeat hheartbeat ~pcie-refclk-gen-clock fixed-clock, pcie-refclk-clockgpio-gate-clock?   ,vcc-1v1-nldo-s3-regulatorregulator-fixedvcc_1v1_nldo_s3 ,vcc-1v2-s3-regulatorregulator-fixed vcc_1v2_s3OO ,vcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@LK@ ,chosen serial2:115200n8dc-12v-regulatorregulator-fixeddc_12v,gpio-keys gpio-keysdefaultbutton-batlow-n BATLOW#   button-slp-btn-n SLP_BTN#   button-wake-n WAKE#   switch-lid-btn-n LID_BTN#   i2s3-soundsimple-audio-card i2s Haikou,I2S-codec 6simple-audio-card,codecX,simple-audio-card,cpuXsgtl5000-oscillator fixed-clockw,vcc3v3-baseboard-regulatorregulator-fixedvcc3v3_baseboard2Z2Z ,vvcc3v3-low-noise-regulatorregulator-fixedvcc3v3_low_noise2Z2Z ,vcc5v0-baseboard-regulatorregulator-fixedvcc5v0_baseboardLK@LK@ ,vcc5v0-otg-regulatorregulator-fixedb  default vcc5v0_otg,+vcc5v0-usb-regulatorregulator-fixed vcc5v0_usbLK@LK@ ,vddd-audio-1v6-regulatorregulator-fixedvddd_audio_1v6jj , compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0rtc0ethernet0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkextconsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesdmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeedvqmmc-supplycd-gpiosdisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplycap-mmc-highspeedmmc-ddr-1_8vmmc-hs200-1_8vmmc-hs400-1_8vmmc-hs400-enhanced-strobemmc-pwrseqno-sdiono-sdnon-removablesupports-cqerockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellspagesizevcc-supplyfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendVDDA-supplyVDDIO-supplyVDDD-supplynum-csgpio-controller#gpio-cellsspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendrts-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsreset-gpiosvpcie3v3-supplyclock_in_outphy-handlephy-modetx_delayrx_delaysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendid-gpioslinux,default-triggercolorenable-gpiosstdout-pathlabellinux,codewakeup-sourcelinux,input-typesimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssimple-audio-card,frame-mastersimple-audio-card,bitclock-mastersound-daienable-active-high