8x( @khadas,edge2rockchip,rk3588s + 7Khadas Edge2aliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55 psci0 7 G0,\ ly@@  cpu@100cpuarm,cortex-a55 psci0 \ ly@@ cpu@200cpuarm,cortex-a55 psci0 \ ly@@ cpu@300cpuarm,cortex-a55 psci0 \ ly@@ cpu@400cpuarm,cortex-a76 psci0 7 G0,\ ly@@cpu@500cpuarm,cortex-a76 psci0 \ ly@@cpu@600cpuarm,cortex-a76 psci0 7 G0,\ ly@@cpu@700cpuarm,cortex-a76 psci0 \ ly@@ idle-states%pscicpu-sleeparm,idle-state2CZdkx{ l2-cache-l0cachen{@ l2-cache-l1cachen{@l2-cache-l2cachen{@l2-cache-l3cachen{@l2-cache-b0cachen{@l2-cache-b1cachen{@l2-cache-b2cachen{@l2-cache-b3cachen{@l3-cachecachen0{@display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14  protocol@16 pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram +sram@0arm,scmi-shmem gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf 7 G 0corecoregroupstacks 0\]^ jobmmugpu( 6okay!="usb@fc000000rockchip,rk3588-dwc3snps,dwc3 @0ref_clksuspend_clkbus_clkIotg Q#$Vusb2-phyusb3-phy `utmi_wide( iRp 6disabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci 0%Q&Vusb( 6okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci 0%Q&Vusb( 6okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci 0'Q(Vusb( 6okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci 0'Q(Vusb( 6okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3 @(0jihkr&ref_clksuspend_clkbus_clkutmipipeIhostQ) Vusb3-phy `utmi_widei4p6okayiommu@fc900000 arm,smmu-v3 @qsvoeventqgerrorpriqcmdq-sync6 6disablediommu@fcb00000 arm,smmu-v3 @}{eventqgerrorpriqcmdq-sync6 6disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfd Xisyscon@fd58c000rockchip,rk3588-sys-grfsyscon Xdsyscon@fd5a4000rockchip,rk3588-vop-grfsyscon Z@ esyscon@fd5a6000rockchip,rk3588-vo0-grfsyscon Z` 0syscon@fd5a8000rockchip,rk3588-vo1-grfsyscon Z@0fsyscon@fd5ac000rockchip,rk3588-usb-grfsyscon Z@syscon@fd5b0000rockchip,rk3588-php-grfsyscon [+syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon [syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon \@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon \@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@0rockchip,rk3588-usb2phy 0phyclk usb480m_phy0imCphyapb 6disabledotg-portO 6disabled#syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@8000rockchip,rk3588-usb2phy 0phyclk usb480m_phy2ioCphyapb6okay%host-portO6okayZ*&syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@c000rockchip,rk3588-usb2phy 0phyclk usb480m_phy3ip Cphyapb6okay'host-portO6okayZ*(syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon ^syscon@fd5f0000rockchip,rk3588-iocsyscon _sram@fd600000 mmio-sram ``+clock-controller@fd7c0000rockchip,rk3588-cru |7]q@GA.2Fq)׫ׄe/ׄ eZ р e+i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c =0ts i2cpclkr,|default+6okayregulator@42rockchip,rk8602 Bvdd_cpu_big0_s0dp !-regulator-state-mem,regulator@43 rockchip,rk8603rockchip,rk8602 Cvdd_cpu_big1_s0dp !-regulator-state-mem,serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uart K0baudclkapb_pclkE..Jtxrxr/|defaultT^ 6disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0 pwmpclkr0|defaultk 6disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0 pwmpclkr1|defaultk 6disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0 pwmpclkr2|defaultk 6disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00 pwmpclkr3|defaultk 6disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd gpower-controller!rockchip,rk3588-power-controllerv+6okay power-domain@8 v+power-domain@9  0!#" 456v+power-domain@10 0!#"7vpower-domain@11 0!#"8vpower-domain@12 09:;<vpower-domain@13 +vpower-domain@14 (0=vpower-domain@15  0>vpower-domain@16 0 ?@A+vpower-domain@17  0 BCDvpower-domain@21 0 EFGHIJKL+vpower-domain@23 0CAMvpower-domain@14  0=vpower-domain@15 0>vpower-domain@22 0Nvpower-domain@24 0[Z]OP+vpower-domain@25 80ZQvpower-domain@26 80QRSvpower-domain@27 00TUVW+vpower-domain@28  0XYvpower-domain@29 (0Z[vpower-domain@30 0z{\vpower-domain@31 @0W]^_`vpower-domain@33 !0WZ[vpower-domain@34 "0WZ[vpower-domain@37 %02avpower-domain@38 &045vpower-domain@40 (bvvideo-codec@fdc70000rockchip,rk3588-av1-vpu lvdpu7ACGׄׄ0AC aclkhclk(  ivop@fdd90000rockchip,rk3588-vop  BPvopgamma-lut80]\abcd[7aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vopc( edefg 6disabledports+port@0+ port@1+ port@2+ port@3+ iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu  ~0]\ aclkiface6(  6disabledci2s@fddc0000rockchip,rk3588-i2s-tdm 0mclk_txmclk_rxhclk7EhJtx( iCtx-m 6disabledi2s@fddf0000rockchip,rk3588-i2s-tdm 0445mclk_txmclk_rxhclk71EhJtx( iCtx-m 6disabledi2s@fddfc000rockchip,rk3588-i2s-tdm 000,mclk_txmclk_rxhclk7-EhJrx( iCrx-m 6disabledqos@fdf35000rockchip,rk3588-qossyscon P 9qos@fdf35200rockchip,rk3588-qossyscon R :qos@fdf35400rockchip,rk3588-qossyscon T ;qos@fdf35600rockchip,rk3588-qossyscon V <qos@fdf36000rockchip,rk3588-qossyscon ` \qos@fdf39000rockchip,rk3588-qossyscon aqos@fdf3d800rockchip,rk3588-qossyscon bqos@fdf3e000rockchip,rk3588-qossyscon ^qos@fdf3e200rockchip,rk3588-qossyscon ]qos@fdf3e400rockchip,rk3588-qossyscon _qos@fdf3e600rockchip,rk3588-qossyscon `qos@fdf40000rockchip,rk3588-qossyscon Zqos@fdf40200rockchip,rk3588-qossyscon  [qos@fdf40400rockchip,rk3588-qossyscon  Tqos@fdf40500rockchip,rk3588-qossyscon  Uqos@fdf40600rockchip,rk3588-qossyscon  Vqos@fdf40800rockchip,rk3588-qossyscon  Wqos@fdf41000rockchip,rk3588-qossyscon  Xqos@fdf41100rockchip,rk3588-qossyscon  Yqos@fdf60000rockchip,rk3588-qossyscon ?qos@fdf60200rockchip,rk3588-qossyscon  @qos@fdf60400rockchip,rk3588-qossyscon  Aqos@fdf61000rockchip,rk3588-qossyscon  Bqos@fdf61200rockchip,rk3588-qossyscon  Cqos@fdf61400rockchip,rk3588-qossyscon  Dqos@fdf62000rockchip,rk3588-qossyscon =qos@fdf63000rockchip,rk3588-qossyscon 0 >qos@fdf64000rockchip,rk3588-qossyscon @ Mqos@fdf66000rockchip,rk3588-qossyscon ` Eqos@fdf66200rockchip,rk3588-qossyscon b Fqos@fdf66400rockchip,rk3588-qossyscon d Gqos@fdf66600rockchip,rk3588-qossyscon f Hqos@fdf66800rockchip,rk3588-qossyscon h Iqos@fdf66a00rockchip,rk3588-qossyscon j Jqos@fdf66c00rockchip,rk3588-qossyscon l Kqos@fdf66e00rockchip,rk3588-qossyscon n Lqos@fdf67000rockchip,rk3588-qossyscon p Nqos@fdf67200rockchip,rk3588-qossyscon r qos@fdf70000rockchip,rk3588-qossyscon 7qos@fdf71000rockchip,rk3588-qossyscon  8qos@fdf72000rockchip,rk3588-qossyscon 4qos@fdf72200rockchip,rk3588-qossyscon " 5qos@fdf72400rockchip,rk3588-qossyscon $ 6qos@fdf80000rockchip,rk3588-qossyscon Qqos@fdf81000rockchip,rk3588-qossyscon  Rqos@fdf81200rockchip,rk3588-qossyscon  Sqos@fdf82000rockchip,rk3588-qossyscon Oqos@fdf82200rockchip,rk3588-qossyscon " Pdfi@fe060000 rockchip,rk3588-dfi@&0:ipcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?00CH>MR)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`'jjjj5FU0k0]Q) Vpcie-phy( "T @ @0 @@dbiapbconfigi). Cpwrpipe+ 6disabledlegacy-interrupt-controllerg jpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O00DI?NSs)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr`'llll5FU@k@]Qm Vpcie-phy( "T @ @0 A@dbiapbconfigi*/ Cpwrpipe+6okay|defaultrn |oplegacy-interrupt-controllerg lethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(067Y^50stmmacethclk_mac_refpclk_macaclk_macptp_ref( !i$ Cstmmacethed+qrs 6disabledmdiosnps,dwmac-mdio+stmmac-axi-configqrx-queues-config#rqueue0queue1tx-queues-config9squeue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci !(0b_eTosatapmaliverxoobrefasicO+ 6disabledsata-port@0 a@Qm Vsata-phyn } sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci #(0dagVqsatapmaliverxoobrefasicO+ 6disabledsata-port@0 a@Q) Vsata-phyn } spi@fe2b0000 rockchip,sfc +@0/0clk_sfchclk_sfc+6okay|defaultrtflash@0jedec,spi-nor mmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc ,@ 0  biuciuciu-driveciu-sample |defaultruvwx( (6okayyzmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc -@ 0biuciuciu-driveciu-sample |defaultr{( % 6disabledmmc@fe2e0000rockchip,rk3588-dwcmshc .7-., G n6 (0,*+-.corebusaxiblocktimer r|}~|default(iCcorebusaxiblocktimer6okay#1@i2s@fe470000rockchip,rk3588-i2s-tdm G0+/(mclk_txmclk_rxhclk7)-E..Jtxrx( &i*+ Ctx-mrx-mZ|default(r 6disabledi2s@fe480000rockchip,rk3588-i2s-tdm H0y}umclk_txmclk_rxhclkE..Jtxrxi^_ Ctx-mrx-mZ|default(r 6disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2s I0i2s_clki2s_hclk7EJtxrx( &|defaultr 6disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2s J0%i2s_clki2s_hclk7"EJtxrx( &|defaultr 6disabledinterrupt-controller@fe600000 arm,gic-v3  `h gua8+msi-controller@fe640000arm,gic-v3-its dkmsi-controller@fe660000arm,gic-v3-its fppi-partitionsinterrupt-partition-0interrupt-partition-1 dma-controller@fea10000arm,pl330arm,primecell @ VW0n apb_pclk.dma-controller@fea30000arm,pl330arm,primecell @ XY0o apb_pclki2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c 0{ i2cpclk>r|default+ 6disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0| i2cpclk?r|default+6okayrtc@51haoyu,hym8563 Qhym8563i2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0} i2cpclk@r|default+ 6disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0~ i2cpclkAr|default+ 6disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkBr|default+ 6disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !0TW pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt 0dc tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spi F0spiclkapb_pclkE..Jtxrx r|default+ 6disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spi G0spiclkapb_pclkE..Jtxrx r|default+ 6disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spi H0spiclkapb_pclkEJtxrxr|default+6okay7G pmic@0rockchip,rk806  |defaultrB@- - - - ,- 8- D- P- \- h- u -   -  dvs1-null-pins gpio_pwrctrl1 pin_fun0dvs2-null-pins gpio_pwrctrl2 pin_fun0dvs3-null-pins gpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1 dp~ vdd_gpu_s0 0"regulator-state-mem,dcdc-reg2dp~vdd_cpu_lit_s0 0regulator-state-mem,dcdc-reg3 L q vdd_log_s0 0regulator-state-mem, qdcdc-reg4dp~ vdd_vdenc_s0 0regulator-state-mem,dcdc-reg5 L  vdd_ddr_s0 0regulator-state-mem, Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg7vdd_2v0_pldo_s3 0regulator-state-mem  dcdc-reg82Z2Z vcc_3v3_s3regulator-state-mem  2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem,dcdc-reg10w@w@ vcc_1v8_s3regulator-state-mem  w@pldo-reg1w@w@ avcc_1v8_s0regulator-state-mem,pldo-reg2w@w@ vcc_1v8_s0regulator-state-mem, w@pldo-reg3OO avdd_1v2_s0regulator-state-mem,pldo-reg42Z2Z 0 vcc_3v3_s0regulator-state-mem,pldo-reg5w@2Z 0 vccio_sd_s0zregulator-state-mem,pldo-reg6w@w@ pldo6_s3regulator-state-mem  w@nldo-reg1 q q vdd_0v75_s3regulator-state-mem  qnldo-reg2 P Pvdd_ddr_pll_s0regulator-state-mem, Pnldo-reg3 q q avdd_0v75_s0regulator-state-mem,nldo-reg4 P P vdd_0v85_s0regulator-state-mem,nldo-reg5 q q vdd_0v75_s0regulator-state-mem,spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spi I0spiclkapb_pclkEJtxrx r|default+ 6disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uart L0baudclkapb_pclkE.. Jtxrxr|default^T 6disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uart M0baudclkapb_pclkE. . Jtxrxr|default^T6okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uart N0baudclkapb_pclkE. . Jtxrxr|default^T 6disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uart O0baudclkapb_pclkE Jtxrxr|default^T 6disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uart P0baudclkapb_pclkE Jtxrxr|default^T 6disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uart Q0baudclkapb_pclkE Jtxrxr|default^T 6disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uart R0baudclkapb_pclkEhhJtxrxr|default^T 6disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uart S0baudclkapb_pclkEh h Jtxrxr|default^T 6disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uart T0baudclkapb_pclkEh h Jtxrxr|default^T6okaypwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0LK pwmpclkr|defaultk 6disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0LK pwmpclkr|defaultk 6disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0LK pwmpclkr|defaultk 6disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00LK pwmpclkr|defaultk 6disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0ON pwmpclkr|defaultk 6disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0ON pwmpclkr|defaultk 6disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0ON pwmpclkr|defaultk 6disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00ON pwmpclkr|defaultk6okaypwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0RQ pwmpclkr|defaultk 6disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0RQ pwmpclkr|defaultk 6disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0RQ pwmpclkr|defaultk6okaypwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00RQ pwmpclkr|defaultk6okaythermal-zonespackage-thermal / E Stripspackage-crit c8 o criticalbigcore0-thermal /d E Stripsbigcore0-alert cL opassivebigcore0-crit c8 o criticalcooling-mapsmap0 z bigcore2-thermal /d E Stripsbigcore2-alert cL opassivebigcore2-crit c8 o criticalcooling-mapsmap0 z  littlecore-thermal /d E Stripslittlecore-alert cL opassivelittlecore-crit c8 o criticalcooling-mapsmap0 z0 center-thermal / E Stripscenter-crit c8 o criticalgpu-thermal /d E Stripsgpu-alert cL opassivegpu-crit c8 o criticalcooling-mapsmap0 z npu-thermal / E Stripsnpu-crit c8 o criticaltsadc@fec00000rockchip,rk3588-tsadc 0tsadcapb_pclk7GiVWCtsadc-apbtsadc   r  |gpiootpout 6okayadc@fec10000rockchip,rk3588-saradc  0saradcapb_pclkiU Csaradc-apb6okay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkCr|default+ 6disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkDr|default+ 6disabledi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkEr|default+ 6disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi J0spiclkapb_pclkEh hJtxrx r|default+ 6disabledefuse@fecc0000rockchip,rk3588-otp  0otpapb_pclkphyarbi Cotpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  npu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell @ Z[0p apb_pclkhphy@fed60000rockchip,rk3588-hdptx-phy 0TrefapbO8i#cde!""Cphyapbinitcmnlaneroplllcplle 6disabledphy@fed80000rockchip,rk3588-usbdp-phy O0lVrefclkimmortalpclkutmi(i   Cinitcmnlanepcs_apbpma_apb  - > T 6disabled$phy@fee00000rockchip,rk3588-naneng-combphy 0vW refapbpipe7GOi<CCphyapb d+ v6okaymphy@fee20000rockchip,rk3588-naneng-combphy 0xW refapbpipe7GOi>ECphyapb d+ v6okay)sram@ff001000 mmio-sram +pinctrlrockchip,rk3588-pinctrle+gpio@fd8a0000rockchip,gpio-bank 0qr  g gpio@fec20000rockchip,gpio-bank 0st  g gpio@fec30000rockchip,gpio-bank 0uv  @ g gpio@fec40000rockchip,gpio-bank 0wx  ` g ogpio@fec50000rockchip,gpio-bank 0yz  g pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-2  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout |emmc-bus8 }emmc-clk ~emmc-cmd emmc-data-strobe eth1fspifspim2-pins` tgmac1gpuhdmii2c0i2c0m2-xfer ,i2c1i2c1m0-xfer  i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2s0i2s0-lrck i2s0-sclk i2s0-sdi0 i2s0-sdi1 i2s0-sdi2 i2s0-sdi3 i2s0-sdo0 i2s0-sdo1 i2s0-sdo2 i2s0-sdo3 i2s1i2s1m0-lrck i2s1m0-sclk i2s1m0-sdi0 i2s1m0-sdi1 i2s1m0-sdi2 i2s1m0-sdi3 i2s1m0-sdo0  i2s1m0-sdo1  i2s1m0-sdo2  i2s1m0-sdo3  i2s2i2s2m1-lrck i2s2m1-sclk  i2s2m1-sdi  i2s2m1-sdo  i2s3i2s3-lrck i2s3-sclk i2s3-sdi i2s3-sdo jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp pmupwm0pwm0m0-pins 0pwm1pwm1m0-pins 1pwm2pwm2m0-pins 2pwm3pwm3m0-pins 3pwm4pwm4m0-pins  pwm5pwm5m0-pins pwm6pwm6m0-pins  pwm7pwm7m0-pins  pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m1-pins  pwm12pwm12m0-pins  pwm13pwm13m0-pins  pwm14pwm14m1-pins  pwm15pwm15m1-pins  refclksatasata0sata1sata2sdiosdiom1-pins` {sdmmcsdmmc-bus4@ xsdmmc-clk usdmmc-cmd vsdmmc-det wspdif0spdif1spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi1m1-cs1 spi2spi2m2-pins0  spi2m2-cs0 spi3spi3m1-pins0  spi3m1-cs0 spi3m1-cs1 spi4spi4m0-pins0 spi4m0-cs0 spi4m0-cs1 tsadctsadc-shut uart0uart0m1-xfer  /uart1uart1m1-xfer   uart2uart2m0-xfer  uart3uart3m1-xfer   uart4uart4m1-xfer   uart5uart5m1-xfer   uart6uart6m1-xfer   uart7uart7m1-xfer   uart8uart8m1-xfer   uart9uart9m2-xfer   uart9m2-ctsn  vopbt656gpio-functsadc-gpio-func vdd_sdvdd-sd-en pcie2pcie2-2-rst npcie2-2-vcc-en usbvcc5v0-host-en  ir-receiverir-receiver-pin wireless-bluetoothbt-reset-pin bt-wake-pin bt-wake-host-irq opp-table-cluster0operating-points-v2  opp-1008000000 <  L L~ @opp-1200000000 G  4 4~ @opp-1416000000 Tfr  ~ @ $opp-1608000000 _"  P P~ @opp-1800000000 kI ~~~ @opp-table-cluster1operating-points-v2 opp-1200000000 G  L LB@ @opp-1416000000 Tfr   B@ @opp-1608000000 _"  B@ @opp-1800000000 kI  P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-cluster2operating-points-v2 opp-1200000000 G  L LB@ @opp-1416000000 Tfr   B@ @opp-1608000000 _"  B@ @opp-1800000000 kI  P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-tableoperating-points-v2!opp-300000000   L L Popp-400000000 ׄ  L L Popp-500000000 e  L L Popp-600000000 #F  L L Popp-700000000 )'  ` ` Popp-800000000 /  q q Popp-900000000 5  5 5 Popp-1000000000 ;  P P Pchosen 0serial2:1500000n8adc-keys adc-keys < Hbuttons Yw@ sdbutton-function Function  Bhir-receivergpio-ir-receiver |defaultrleds pwm-ledsled-0 red_led  off indicator none  aled-1 green_led  on power default-on  aled-2 blue_led  off indicator none  avcc3v3-pcie-wl-regulatorregulator-fixed  |defaultrvcc3v3_pcie_wl2Z2Z !-pvcc5v0-host-regulatorregulator-fixed vcc5v0_hostLK@LK@   |defaultr!-*vcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@LK@-vcc-1v1-nldo-s3-regulatorregulator-fixedvcc_1v1_nldo_s3!-vdd-3v3-sd-regulatorregulator-fixed vdd_3v3_sd  2Z2Z!|defaultry compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerreset-gpiosvpcie3v3-supplyrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthfifo-depthcap-sd-highspeeddisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellswakeup-sourcenum-cssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltcolordefault-statelinux,default-triggermax-brightnesspwmsenable-active-highstartup-delay-usgpio