8<( Gradxa,rock-5arockchip,rk3588s +7Radxa ROCK 5Aaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/ethernet@fe1c0000/mmc@fe2e0000/mmc@fe2c0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0 cpuarm,cortex-a55psci': A Q0,f v@@  'cpu@100 cpuarm,cortex-a55psci': f v@@ 'cpu@200 cpuarm,cortex-a55psci': f v@@ 'cpu@300 cpuarm,cortex-a55psci': f v@@ 'cpu@400 cpuarm,cortex-a76psci': A Q0,f v@@'cpu@500 cpuarm,cortex-a76psci': f v@@'cpu@600 cpuarm,cortex-a76psci': A Q0,f v@@'cpu@700 cpuarm,cortex-a76psci': f v@@' idle-states/pscicpu-sleeparm,idle-state<Mddux' l2-cache-l0cachex@' l2-cache-l1cachex@'l2-cache-l2cachex@'l2-cache-l3cachex@'l2-cache-b0cachex@'l2-cache-b1cachex@'l2-cache-b2cachex@'l2-cache-b3cachex@'l3-cachecachex0@'display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tz smcscmi arm,scmi-smc+protocol@14' protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0 smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram+sram@0arm,scmi-shmem'gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf A Q :&corecoregroupstacks 0\]^ jobmmugpu2  @disabled!'usb@fc000000rockchip,rk3588-dwc3snps,dwc3@:&ref_clksuspend_clkbus_clkGhost O"#Tusb2-phyusb3-phy ^utmi_wide2 gRn@okayusb@fc800000"rockchip,rk3588-ehcigeneric-ehci:$O%Tusb2 @okaydefault(&'()*usb@fc840000"rockchip,rk3588-ohcigeneric-ohci:$O%Tusb2 @okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci:+O,Tusb2 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Ypwrpipe+ @disabledlegacy-interrupt-controllere 'npcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O0:DI?NSs)&aclk_mstaclk_slvaclk_dbipclkauxpipe pciPsyspmcmsglegacyerr`%pppp3DS@o@[Oq Tpcie-phy2 "T @ @0 A@dbiapbconfigg*/ Ypwrpipe+ @disabledlegacy-interrupt-controllere 'pethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a macirqeth_wake_irq(:67Y^50&stmmacethclk_mac_refpclk_macaclk_macptp_ref2 !g$ Ystmmaceth{hz/rst@okayoutputurgmii(vwxyzdefault:>mdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916default({N  0|'ustmmac-axi-config<FV'rrx-queues-configf'squeue0queue1tx-queues-config|'tqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(:b_eTo&satapmaliverxoobrefasic+ @disabledsata-port@0@Oq Tsata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(:dagVq&satapmaliverxoobrefasic+ @disabledsata-port@0@O- Tsata-phy  spi@fe2b0000 rockchip,sfc+@:/0&clk_sfchclk_sfc+ @disableddefault(}flash@0jedec,spi-nor2mmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ :  &biuciuciu-driveciu-sampleрdefault(~2 (@okay  1:EMTbnmmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ :&biuciuciu-driveciu-sample default(2 % @disabledmmc@fe2e0000rockchip,rk3588-dwcmshc.A-., Q n6 (:,*+-.&corebusaxiblocktimer (default(gYcorebusaxiblocktimer@okayE{i2s@fe470000rockchip,rk3588-i2s-tdmG:+/(&mclk_txmclk_rxhclkA)-C22Htxrx2 &g*+ Ytx-mrx-mdefault(@okayport'endpointi2s'i2s@fe480000rockchip,rk3588-i2s-tdmH:y}u&mclk_txmclk_rxhclkC22Htxrxg^_ Ytx-mrx-mdefault(( @disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI:&i2s_clki2s_hclkACHtxrx2 &default( @disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ:%&i2s_clki2s_hclkA"CHtxrx2 &default( @disabledinterrupt-controller@fe600000 arm,gic-v3 `h ea 8 +'msi-controller@fe640000arm,gic-v3-itsd  'omsi-controller@fe660000arm,gic-v3-itsf  ppi-partitionsinterrupt-partition-0 %'interrupt-partition-1 % 'dma-controller@fea10000arm,pl330arm,primecell@ VW .:n &apb_pclk E'2dma-controller@fea30000arm,pl330arm,primecell@ XY .:o &apb_pclk E'i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c:{ &i2cpclk>(default+ @disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c:| &i2cpclk?(default+@okayregulator@42rockchip,rk8602B vdd_npu_s0dp~ 1regulator-state-mem*eeprom@50belling,bl24c16aatmel,24c16P Pi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c:} &i2cpclk@(default+@okayi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c:~ &i2cpclkA(default+ @disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c: &i2cpclkB(default+@okaytimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !:TW &pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt:dc &tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF:&spiclkapb_pclkC22Htxrx Y (default+ @disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG:&spiclkapb_pclkC22Htxrx Y (default+ @disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH:&spiclkapb_pclkCHtxrx Y(default+@okayAQ pmic@0rockchip,rk806 default(B@ ` x1 1 1 1 1 1 1 1 1 1  1   %1 1 Advs1-null-pins Mgpio_pwrctrl1 Rpin_fun0'dvs2-null-pins Mgpio_pwrctrl2 Rpin_fun0'dvs3-null-pins Mgpio_pwrctrl3 Rpin_fun0'regulatorsdcdc-reg1 vdd_gpu_s0dp~ 0 [regulator-state-mem*dcdc-reg2vdd_cpu_lit_s0dp~ 0'regulator-state-mem*dcdc-reg3 vdd_log_s0 L q 0regulator-state-mem* w qdcdc-reg4 vdd_vdenc_s0dp~ 0regulator-state-mem*dcdc-reg5 vdd_ddr_s0 L  0regulator-state-mem* w Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg7vdd_2v0_pldo_s3 0'regulator-state-mem  wdcdc-reg8 vcc_3v3_s32Z2Zregulator-state-mem  w2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem*dcdc-reg10 vcc_1v8_s3w@w@regulator-state-mem  ww@pldo-reg1 avcc_1v8_s0w@w@'regulator-state-mem*pldo-reg2 vcc_1v8_s0w@w@regulator-state-mem* ww@pldo-reg3 avdd_1v2_s0OOregulator-state-mem*pldo-reg4 vcc_3v3_s02Z2Z 0'regulator-state-mem*pldo-reg5 vccio_sd_s0w@2Z 0'regulator-state-mem*pldo-reg6 pldo6_s3w@w@regulator-state-mem  ww@nldo-reg1 vdd_0v75_s3 q qregulator-state-mem  w qnldo-reg2vdd_ddr_pll_s0 P Pregulator-state-mem* w Pnldo-reg3 avdd_0v75_s0 q qregulator-state-mem*nldo-reg4 vdd_0v85_s0 P Pregulator-state-mem*nldo-reg5 vdd_0v75_s0 q qregulator-state-mem*spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI:&spiclkapb_pclkCHtxrx Y (default+ @disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL:&baudclkapb_pclkC22 Htxrx(default\R @disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM:&baudclkapb_pclkC2 2 Htxrx(default\R@okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN:&baudclkapb_pclkC2 2 Htxrx(default\R @disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO:&baudclkapb_pclkC Htxrx(default\R @disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP:&baudclkapb_pclkC Htxrx(default\R @disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ:&baudclkapb_pclkC Htxrx(default\R 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@disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ &pwmpclk(defaulti @disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm:RQ &pwmpclk(defaulti @disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm :RQ &pwmpclk(defaulti @disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm0:RQ &pwmpclk(defaulti @disabledthermal-zonespackage-thermal   tripspackage-crit 8  criticalbigcore0-thermal d  tripsbigcore0-alert L passive'bigcore0-crit 8  criticalcooling-mapsmap0  bigcore2-thermal d  tripsbigcore2-alert L passive'bigcore2-crit 8  criticalcooling-mapsmap0   littlecore-thermal d  tripslittlecore-alert L passive'littlecore-crit 8  criticalcooling-mapsmap0 0 center-thermal   tripscenter-crit 8  criticalgpu-thermal d  tripsgpu-alert L passive'gpu-crit 8  criticalcooling-mapsmap0  npu-thermal   tripsnpu-crit 8  criticaltsadc@fec00000rockchip,rk3588-tsadc:&tsadcapb_pclkAQgVWYtsadc-apbtsadc  ! 8( S gpiootpout ]@okay'adc@fec10000rockchip,rk3588-saradc s:&saradcapb_pclkgU Ysaradc-apb@okay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c: &i2cpclkC(default+ @disabledi2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c: &i2cpclkD(default+@okayaudio-codec@11everest,es8316:1&mclkA1Qportendpoint'i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c: &i2cpclkE(default+ @disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ:&spiclkapb_pclkCl lHtxrx Y (default+ @disabledefuse@fecc0000rockchip,rk3588-otp :&otpapb_pclkphyarbg Yotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[ .:p &apb_pclk E'lphy@fed60000rockchip,rk3588-hdptx-phy :T&refapbe8g#cde!""Yphyapbinitcmnlaneroplllcpll{ @disabledphy@fed80000rockchip,rk3588-usbdp-phye:lV&refclkimmortalpclkutmi(g   Yinitcmnlanepcs_apbpma_apb    @okay '#phy@fee00000rockchip,rk3588-naneng-combphy:vW &refapbpipeAQeg<CYphyapb /  @disabled'qphy@fee20000rockchip,rk3588-naneng-combphy:xW &refapbpipeAQeg>EYphyapb / @okay'-sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrl{+'gpio@fd8a0000rockchip,gpio-bank:qr 1  e A'gpio@fec20000rockchip,gpio-bank:st 1  e Agpio@fec30000rockchip,gpio-bank:uv 1 @ e Agpio@fec40000rockchip,gpio-bank:wx 1 ` e A'|gpio@fec50000rockchip,gpio-bank:yz 1  e A'pcfg-pull-up )'pcfg-pull-down 6'pcfg-pull-none E'pcfg-pull-none-drv-level-2 E R'pcfg-pull-up-drv-level-1 ) R'pcfg-pull-up-drv-level-2 ) R'pcfg-pull-none-smt E a'pcfg-output-high v'auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout 'emmc-bus8 'emmc-clk 'emmc-cmd 'emmc-data-strobe 'eth1fspifspim0-pins` '}gmac1gmac1-miim 'vgmac1-rx-bus20  'xgmac1-tx-bus20    'wgmac1-rgmii-clk 'ygmac1-rgmii-bus@ 'zgpuhdmii2c0i2c0m2-xfer '0i2c1i2c1m0-xfer  'i2c2i2c2m0-xfer   'i2c3i2c3m0-xfer   'i2c4i2c4m0-xfer   'i2c5i2c5m2-xfer   'i2c6i2c6m0-xfer   'i2c7i2c7m0-xfer   'i2c8i2c8m0-xfer   'i2s0i2s0-lrck 'i2s0-mclk 'i2s0-sclk 'i2s0-sdi0 'i2s0-sdo0 'i2s1i2s1m0-lrck 'i2s1m0-sclk 'i2s1m0-sdi0 'i2s1m0-sdi1 'i2s1m0-sdi2 'i2s1m0-sdi3 'i2s1m0-sdo0  'i2s1m0-sdo1  'i2s1m0-sdo2  'i2s1m0-sdo3  'i2s2i2s2m1-lrck 'i2s2m1-sclk  'i2s2m1-sdi  'i2s2m1-sdo  'i2s3i2s3-lrck 'i2s3-sclk 'i2s3-sdi 'i2s3-sdo 'jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp 'pmupwm0pwm0m0-pins '4pwm1pwm1m0-pins '5pwm2pwm2m0-pins '6pwm3pwm3m1-pins  '7pwm4pwm4m0-pins  'pwm5pwm5m0-pins 'pwm6pwm6m0-pins  'pwm7pwm7m0-pins  'pwm8pwm8m0-pins  'pwm9pwm9m0-pins  'pwm10pwm10m0-pins  'pwm11pwm11m0-pins  'pwm12pwm12m0-pins  'pwm13pwm13m0-pins  'pwm14pwm14m0-pins  'pwm15pwm15m0-pins  'refclksatasata0sata1sata2sdiosdiom1-pins` 'sdmmcsdmmc-bus4@ 'sdmmc-clk '~sdmmc-cmd 'sdmmc-det 'spdif0spdif1spi0spi0m0-pins0 'spi0m0-cs0 'spi0m0-cs1 'spi1spi1m1-pins0 'spi1m1-cs0 'spi1m1-cs1 'spi2spi2m2-pins0  'spi2m2-cs0 'spi3spi3m1-pins0  'spi3m1-cs0 'spi3m1-cs1 'spi4spi4m0-pins0 'spi4m0-cs0 'spi4m0-cs1 'tsadctsadc-shut 'uart0uart0m1-xfer  '3uart1uart1m1-xfer   'uart2uart2m0-xfer  'uart3uart3m1-xfer   'uart4uart4m1-xfer   'uart5uart5m1-xfer   'uart6uart6m1-xfer   'uart7uart7m1-xfer   'uart8uart8m1-xfer   'uart9uart9m1-xfer   'vopbt656gpio-functsadc-gpio-func 'ledsio-led 'powervcc-5v0-en 'rtl8211frtl8211f-rst '{usbvcc5v0-host-en  'wifibtwl-reset '&wl-dis ''wl-wake-host '(bt-dis ')bt-wake-host '*opp-table-cluster0operating-points-v2 ' opp-1008000000 < L L~ @opp-1200000000 G 4 4~ @opp-1416000000 Tfr ~ @ opp-1608000000 _" P P~ @opp-1800000000 kI ~~~ @opp-table-cluster1operating-points-v2 'opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-cluster2operating-points-v2 'opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-tableoperating-points-v2'!opp-300000000  L L Popp-400000000 ׄ L L Popp-500000000 e L L Popp-600000000 #F L L Popp-700000000 )' ` ` Popp-800000000 / q q Popp-900000000 5 5 5 Popp-1000000000 ; P P Panalog-soundaudio-graph-card rk3588-es8316) MicrophoneMic JackHeadphoneHeadphones. MIC2Mic JackHeadphonesHPOLHeadphonesHPOR chosen serial2:1500000n8leds gpio-ledsdefault(io-led  Rstatus 6| heartbeatpwm-fanpwm-fan _  *Pvcc12v-dcin-regulatorregulator-fixed vcc12v_dcin'vcc5v0-host-regulatorregulator-fixed vcc5v0_hostLK@LK@ / B default(1'.vcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@LK@'1vcc-5v0-regulatorregulator-fixedvcc_5v0LK@LK@ / Bdefault(1'vcc-1v1-nldo-s3-regulatorregulator-fixedvcc_1v1_nldo_s31' compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4ethernet0mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkpinctrl-namespinctrl-0snps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modetx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiossnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthfifo-depthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlydai-formatmclk-fsremote-endpointmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellspagesizenum-cssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,dp-lane-muxrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendlabelwidgetsroutingdaisstdout-pathcolorlinux,default-triggercooling-levelsfan-supplypwmsenable-active-highgpio