{8m (l4coolpi,pi-cm5-genbookcoolpi,pi-cm5rockchip,rk3588 +7CoolPi CM5 GenBookaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000/mmc@fe2d0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55psci"5 < LY@kx@  cpu@100cpuarm,cortex-a55psci"5 < LY@kx@ cpu@200cpuarm,cortex-a55psci"5 < LY@kx@ cpu@300cpuarm,cortex-a55psci"5 < LY@kx@ cpu@400cpuarm,cortex-a76psci"5 < LY@kx@cpu@500cpuarm,cortex-a76psci"5 < LY@kx@cpu@600cpuarm,cortex-a76psci"5 < LY@kx@cpu@700cpuarm,cortex-a76psci"5 < LY@kx@ idle-statespscicpu-sleeparm,idle-state#:dKx[ l2-cache-l0cacheN[@mlx l2-cache-l1cacheN[@mlxl2-cache-l2cacheN[@mlxl2-cache-l3cacheN[@mlxl2-cache-b0cacheN[@mlxl2-cache-b1cacheN[@mlxl2-cache-b2cacheN[@mlxl2-cache-b3cacheN[@mlxl3-cachecacheN0[@mlxdisplay-subsystemrockchip,display-subsystemfirmwarescmi arm,scmi-smc+protocol@14 protocol@16hdmi0-soundsimple-audio-cardi2shdmi0 disabledsimple-audio-card,codecsimple-audio-card,cpupmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmu psci arm,psci-1.0smcclock-0 fixed-clock)׫-splltimerarm,armv8-timerP    %@sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6-xin24mclock-2 fixed-clock-xin32kreserved-memory+Pshmem@10f000arm,scmi-shmemWhdmi-receiver-cmashared-dma-pool^T kW disabledgpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf u  5!!!corecoregroupstacks 0\]^ @jobmmugpu" okay#$usb@fc000000rockchip,rk3588-dwc3snps,dwc3@5!!!ref_clksuspend_clkbus_clk peripheral %&usb2-phyusb3-phy utmi_wide"!R/Pqokay high-speedusb@fc800000"rockchip,rk3588-ehcigeneric-ehci5!!!'(usb"okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci5!!!'(usb"okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci5!!!)*usb"okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci5!!!)*usb"okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(5!j!i!h!k!r&ref_clksuspend_clkbus_clkutmipipehost+ usb3-phy utmi_wide!4/Pq disablediommu@fc900000 arm,smmu-v3 @qsvo@eventqgerrorpriqcmdq-synciommu@fcb00000 arm,smmu-v3 @}{@eventqgerrorpriqcmdq-sync disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX}syscon@fd58c000rockchip,rk3588-sys-grfsysconXnsyscon@fd5e8000!rockchip,rk3588-dcphy-grfsyscon^@syscon@fd5ec000!rockchip,rk3588-dcphy-grfsyscon^@syscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ osyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` 5!syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@5!psyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@syscon@fd5b0000rockchip,rk3588-php-grfsyscon[.syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon[syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@0rockchip,rk3588-usb2phy5!phyclk -usb480m_phy0!m!phyapbokayotg-portokay%syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy5!phyclk -usb480m_phy2!o!phyapbokay'host-portokay,(syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy5!phyclk -usb480m_phy3!p! phyapbokay)host-portokay-*syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^syscon@fd5f0000rockchip,rk3588-iocsyscon_sram@fd600000 mmio-sram`P`+clock-controller@fd7c0000rockchip,rk3588-cru|u!!!!!!!!!!!!!]!q!!@A.2Fq)׫ׄe/ׄ eZ р .!i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=5!t!s i2cpclk/default+okayregulator@42rockchip,rk8602B,vdd_cpu_big0_s0;Oadpy0regulator-state-memregulator@43 rockchip,rk8603rockchip,rk8602C,vdd_cpu_big1_s0;Oadpy0regulator-state-memserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK5!!baudclkapb_pclk11txrx2default disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5!! pwmpclk3default disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5!! pwmpclk4default disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5!! pwmpclk5default disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05!! pwmpclk6default disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfdqpower-controller!rockchip,rk3588-power-controller+okay"power-domain@8+power-domain@9  5!!!#!"! 789+power-domain@10 5!!!#!":power-domain@11 5!!!#!";power-domain@12 5!!!<=>?$power-domain@13 +power-domain@14(5!!!!!@power-domain@15 5!!!!Apower-domain@165!! BCD+power-domain@17 5!!!! EFGpower-domain@215!!!!!!!!!!!!!!!!!! HIJKLMNO+power-domain@235!C!A!Ppower-domain@14 5!!!!@power-domain@155!!!Apower-domain@225!!Qpower-domain@245![!Z!]RS+power-domain@2585!!!!!!!ZTpower-domain@2685!!!!!!!QUVpower-domain@2705!!!!!!WXYZ+power-domain@28 5!!!![\power-domain@29(5!!!!!]^power-domain@305!z!{_power-domain@31@5!W!!!!!!!`abcpower-domain@33!5!W!Z![power-domain@34"5!W!Z![power-domain@37%5!!2dpower-domain@38&5!4!5power-domain@40(evideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpuw@vdpu5!! aclkhclk$f"iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu@v aclkiface5!!"frga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rgat5!!!aclkhclksclk!r!q!p coreaxiahb"video-codec@fdba0000rockchip,rk3588-vepu121z5!! aclkhclk$g"iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu@y5!! aclkiface"gvideo-codec@fdba4000rockchip,rk3588-vepu121@|5!! aclkhclk$h"iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommuH@{5!! aclkiface"hvideo-codec@fdba8000rockchip,rk3588-vepu121~5!! aclkhclk$i"iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu@}5!! aclkiface"ivideo-codec@fdbac000rockchip,rk3588-vepu1215!! aclkhclk$j"iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu@5!! aclkiface"jvideo-codec@fdc70000rockchip,rk3588-av1-vpul@vdpuu!A!Cׄׄ5!A!C aclkhclk" !!!!vop@fdd90000rockchip,rk3588-vop BP+vopgamma-lut@5!]!\!a!b!c!d![klQaclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_voppll_hdmiphy0pll_hdmiphy1$m"n5oFpWqokayu!`d!ports+port@0+endpoint@2{r{port@1+port@2+endpoint@9 {s port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~5!]!\ aclkiface"okaymspdif-tx@fddb0000,rockchip,rk3588-spdifrockchip,rk3568-spdifd!u! mclkhclk5!!txt" disabledi2s@fddc0000rockchip,rk3588-i2s-tdm5!!!mclk_txmclk_rxhclku!d!utx"!tx-m disabledspdif-tx@fdde0000,rockchip,rk3588-spdifrockchip,rk3568-spdifd!u!A mclkhclk5!D!@txt" disabledi2s@fddf0000rockchip,rk3588-i2s-tdm5!4!4!5mclk_txmclk_rxhclku!1d!utx"!tx-m disabledi2s@fddfc000rockchip,rk3588-i2s-tdm5!0!0!,mclk_txmclk_rxhclku!-d!urx"!rx-m disableddsi@fde20000rockchip,rk3588-mipi-dsi25!e!g pclksys!apb"v dcphyo disabledports+port@0port@1dsi@fde30000rockchip,rk3588-mipi-dsi25!f!h pclksys!apb"w dcphyo disabledports+port@0port@1hdmi@fde80000rockchip,rk3588-dw-hdmi-qp05!!!!4!R!pclkearcrefaudhdphclk_vo1Ph@avpcecearcmainhpdkdefault xyz"!!0refhdpnpokayports+port@0endpoint{{rport@1endpoint{|6edp@fdec0000rockchip,rk3588-edp5!!dppclkkdp"!!dpapbp disabledports+port@0port@1qos@fdf35000rockchip,rk3588-qossysconP <qos@fdf35200rockchip,rk3588-qossysconR =qos@fdf35400rockchip,rk3588-qossysconT >qos@fdf35600rockchip,rk3588-qossysconV ?qos@fdf36000rockchip,rk3588-qossyscon` _qos@fdf39000rockchip,rk3588-qossyscon dqos@fdf3d800rockchip,rk3588-qossyscon eqos@fdf3e000rockchip,rk3588-qossyscon aqos@fdf3e200rockchip,rk3588-qossyscon `qos@fdf3e400rockchip,rk3588-qossyscon bqos@fdf3e600rockchip,rk3588-qossyscon cqos@fdf40000rockchip,rk3588-qossyscon ]qos@fdf40200rockchip,rk3588-qossyscon ^qos@fdf40400rockchip,rk3588-qossyscon Wqos@fdf40500rockchip,rk3588-qossyscon Xqos@fdf40600rockchip,rk3588-qossyscon Yqos@fdf40800rockchip,rk3588-qossyscon Zqos@fdf41000rockchip,rk3588-qossyscon [qos@fdf41100rockchip,rk3588-qossyscon \qos@fdf60000rockchip,rk3588-qossyscon Bqos@fdf60200rockchip,rk3588-qossyscon Cqos@fdf60400rockchip,rk3588-qossyscon Dqos@fdf61000rockchip,rk3588-qossyscon Eqos@fdf61200rockchip,rk3588-qossyscon Fqos@fdf61400rockchip,rk3588-qossyscon Gqos@fdf62000rockchip,rk3588-qossyscon @qos@fdf63000rockchip,rk3588-qossyscon0 Aqos@fdf64000rockchip,rk3588-qossyscon@ Pqos@fdf66000rockchip,rk3588-qossyscon` Hqos@fdf66200rockchip,rk3588-qossysconb Iqos@fdf66400rockchip,rk3588-qossyscond Jqos@fdf66600rockchip,rk3588-qossysconf Kqos@fdf66800rockchip,rk3588-qossysconh Lqos@fdf66a00rockchip,rk3588-qossysconj Mqos@fdf66c00rockchip,rk3588-qossysconl Nqos@fdf66e00rockchip,rk3588-qossysconn Oqos@fdf67000rockchip,rk3588-qossysconp Qqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon :qos@fdf71000rockchip,rk3588-qossyscon ;qos@fdf72000rockchip,rk3588-qossyscon 7qos@fdf72200rockchip,rk3588-qossyscon" 8qos@fdf72400rockchip,rk3588-qossyscon$ 9qos@fdf80000rockchip,rk3588-qossyscon Tqos@fdf81000rockchip,rk3588-qossyscon Uqos@fdf81200rockchip,rk3588-qossyscon Vqos@fdf82000rockchip,rk3588-qossyscon Rqos@fdf82200rockchip,rk3588-qossyscon" Sdfi@fe060000rockchip,rk3588-dfi@&0:W}pcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?05!C!H!>!M!R!)aclk_mstaclk_slvaclk_dbipclkauxpipepciP@syspmcmsglegacyerr`~~~~0000+ pcie-phy""TP @ @0 @@+dbiapbconfig!)!. pwrpipe+ disabledlegacy-interrupt-controller$ ~pcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O05!D!I!?!N!S!s)aclk_mstaclk_slvaclk_dbipclkauxpipepciP@syspmcmsglegacyerr`@@@@ pcie-phy""TP @ @0 A@+dbiapbconfig!*!/ pwrpipe+ disabled 9Edefaultlegacy-interrupt-controller$ ethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a @macirqeth_wake_irq(5!6!7!Y!^!50stmmacethclk_mac_refpclk_macaclk_macptp_ref"!!$ stmmacethnU.fv disabledmdiosnps,dwmac-mdio+stmmac-axi-configrx-queues-configqueue0queue1tx-queues-configqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(5!b!_!e!T!osatapmaliverxoobrefasic + disabledsata-port@0@ sata-phy+ : sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(5!d!a!g!V!qsatapmaliverxoobrefasic + disabledsata-port@0@+ sata-phy+ : spi@fe2b0000 rockchip,sfc+@5!/!0clk_sfchclk_sfc+okaydefaultflash@0jedec,spi-norI[lmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ 5  !!biuciuciu-driveciu-sample}Mрdefault"( disabledb mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ 5!!!!biuciuciu-driveciu-sample}M default"% disabledmmc@fe2e0000rockchip,rk3588-dwcmshc.u!-!.!,  n6 (5!,!*!+!-!.corebusaxiblocktimerM default(!!!!!corebusaxiblocktimerokayb  rng@fe378000rockchip,rk3588-rng75 0i2s@fe470000rockchip,rk3588-i2s-tdmG5!+!/!(mclk_txmclk_rxhclku!)!-d!!11txrx"&!*!+ tx-mrx-m &defaultokayport/endpoint Ai2s{i2s@fe480000rockchip,rk3588-i2s-tdmH5!y!}!umclk_txmclk_rxhclk11txrx!^!_ tx-mrx-m &default( disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI5!!i2s_clki2s_hclku!d!tttxrx"&default disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ5!%!i2s_clki2s_hclku!"d!tttxrx"&default disabledspdif-tx@fe4e0000,rockchip,rk3588-spdifrockchip,rk3568-spdifNd!u!7 mclkhclk5!9!6tx1default"& disabledspdif-tx@fe4f0000,rockchip,rk3588-spdifrockchip,rk3568-spdifOd!u!= mclkhclk5!?!<txtdefault"& disabledinterrupt-controller@fe600000 arm,gic-v3 `h $ L \a f8 qP+msi-controller@fe640000arm,gic-v3-itsd L q msi-controller@fe660000arm,gic-v3-itsf L q ppi-partitionsinterrupt-partition-0 interrupt-partition-1   dma-controller@fea10000arm,pl330arm,primecell@ VW 5!n apb_pclk 1dma-controller@fea30000arm,pl330arm,primecell@ XY 5!o apb_pclk ti2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c5!!{ i2cpclk>default+ disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c5!!| i2cpclk?default+okayregulator@42rockchip,rk8602B ,vdd_npu_s0;Oadpy~0regulator-state-memi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c5!!} i2cpclk@default+ disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c5!!~ i2cpclkAdefault+okaycw2015@62cellwise,cw2015b@ giccbb_RsLZ[KB:3-)(.1dcdc-reg7;Oay0,vdd_2v0_pldo_s3regulator-state-mem > "dcdc-reg8;Oa2Zy2Z ,vcc_3v3_s3regulator-state-mem > "2Zdcdc-reg9;O ,vddq_ddr_s0regulator-state-memdcdc-reg10;Oaw@yw@ ,vcc_1v8_s3regulator-state-mem > "w@pldo-reg1;Oaw@yw@ ,avcc_1v8_s01regulator-state-mempldo-reg2;Oaw@yw@ ,vcc_1v8_s0regulator-state-mem "w@pldo-reg3;OaOyO ,avdd_1v2_s0regulator-state-mempldo-reg4;Oa2Zy2Z0 ,vcc_3v3_s0regulator-state-mempldo-reg5;Oaw@y2Z0 ,vccio_sd_s0regulator-state-mempldo-reg6;Oaw@yw@ ,pldo6_s3regulator-state-mem > "w@nldo-reg1;Oa qy q ,vdd_0v75_s3regulator-state-mem > " qnldo-reg2;Oa Py P,vdd_ddr_pll_s0regulator-state-mem " Pnldo-reg3;Oa qy q ,avdd_0v75_s02regulator-state-memnldo-reg4;Oa Py P ,vdd_0v85_s00regulator-state-memnldo-reg5;Oa qy q ,vdd_0v75_s0regulator-state-memspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI5!!spiclkapb_pclktttxrx  default+ disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL5!!baudclkapb_pclk11 txrxdefault disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM5!!baudclkapb_pclk1 1 txrxdefaultokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN5!!baudclkapb_pclk1 1 txrxdefault disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO5!!baudclkapb_pclkt t txrxdefault disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP5!!baudclkapb_pclkt t txrxdefault disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ5!!baudclkapb_pclkt ttxrxdefault disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR5!!baudclkapb_pclkuutxrxdefault disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS5!!baudclkapb_pclku u txrxdefault disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT5!!baudclkapb_pclku u txrxdefault disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5!L!K pwmpclkdefault disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5!L!K pwmpclkdefault disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5!L!K pwmpclkdefaultokay5pwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05!L!K pwmpclkdefault disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5!O!N pwmpclkdefault disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5!O!N pwmpclkdefault disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5!O!N pwmpclkdefault disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05!O!N pwmpclkdefault disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5!R!Q pwmpclkdefault disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5!R!Q pwmpclkdefault disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5!R!Q pwmpclkdefault disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05!R!Q pwmpclkdefault disabledthermal-zonespackage-thermal V l ztripspackage-crit 8   criticalbigcore0-thermal Vd l ztripsbigcore0-alert L  passivebigcore0-crit 8   criticalcooling-mapsmap0  bigcore2-thermal Vd l ztripsbigcore2-alert L  passivebigcore2-crit 8   criticalcooling-mapsmap0   littlecore-thermal Vd l ztripslittlecore-alert L  passivelittlecore-crit 8   criticalcooling-mapsmap0 0 center-thermal V l ztripscenter-crit 8   criticalgpu-thermal Vd l ztripsgpu-alert L  passivegpu-crit 8   criticalcooling-mapsmap0  npu-thermal V l ztripsnpu-crit 8   criticaltsadc@fec00000rockchip,rk3588-tsadc5!!tsadcapb_pclku!!V!Wtsadc-apbtsadc    defaultsleep okayadc@fec10000rockchip,rk3588-saradc 5!!saradcapb_pclk!U saradc-apbokay 0i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c5!! i2cpclkCdefault+okayrtc@51haoyu,hym8563Q -hym8563default <i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c5!! i2cpclkDdefault+okayaudio-codec@10everest,es8316u!15!1mclkportendpoint{i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c5!! i2cpclkEdefault+ disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ5!!spiclkapb_pclku utxrx  default+ disabledefuse@fecc0000rockchip,rk3588-otp 5!!!!otpapb_pclkphyarb!!! otpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c Jnpu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[ 5!p apb_pclk uphy@fed60000rockchip,rk3588-hdptx-phy 5!!Trefapb8!#!!c!d!e!!!""phyapbinitcmnlaneroplllcpllokaykphy@fed80000rockchip,rk3588-usbdp-phy5!!l!Vrefclkimmortalpclkutmi(! ! ! !!initcmnlanepcs_apbpma_apb O b sokay&phy@feda0000rockchip,rk3588-mipi-dcphy5!! pclkref !i!!!jm_phyapbgrfs_phy disabledvphy@fedb0000rockchip,rk3588-mipi-dcphy5!! pclkref !k!!!lm_phyapbgrfs_phy disabledwphy@fee00000rockchip,rk3588-naneng-combphy5!!v!W refapbpipeu!!<!Cphyapb . okayphy@fee20000rockchip,rk3588-naneng-combphy5!!x!W refapbpipeu!!>!Ephyapb . okay+sram@ff001000 mmio-sramP+pinctrlrockchip,rk3588-pinctrlP+gpio@fd8a0000rockchip,gpio-bank5!q!r # $ 3gpio@fec20000rockchip,gpio-bank5!s!t # $ 3gpio@fec30000rockchip,gpio-bank5!u!v # @ $ 3gpio@fec40000rockchip,gpio-bank5!w!x # ` $ 3gpio@fec50000rockchip,gpio-bank5!y!z # $ 3pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-2  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  pcfg-pull-none-drv-level-1-smt   pcfg-pull-none-drv-level-3-smt   pcfg-pull-none-drv-level-5-smt   auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout emmc-bus8 emmc-clk emmc-cmd emmc-data-strobe eth1fspifspim2-pins` gmac1gpuhdmihdmim0-tx0-hpd xhdmim0-tx0-scl yhdmim0-tx0-sda zhdmim0-tx1-hpd  hdmim1-tx1-scl  hdmim1-tx1-sda  hdmim2-tx1-cec  i2c0i2c0m2-xfer /i2c1i2c1m0-xfer  i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m3-xfer   i2c5i2c5m3-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2s0i2s0-lrck i2s0-mclk i2s0-sclk i2s0-sdi0 i2s0-sdo0 i2s1i2s1m0-lrck i2s1m0-sclk i2s1m0-sdi0 i2s1m0-sdi1 i2s1m0-sdi2 i2s1m0-sdi3 i2s1m0-sdo0  i2s1m0-sdo1  i2s1m0-sdo2  i2s1m0-sdo3  i2s2i2s2m1-lrck i2s2m1-sclk  i2s2m1-sdi  i2s2m1-sdo  i2s3i2s3-lrck i2s3-sclk i2s3-sdi i2s3-sdo jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp pmupwm0pwm0m0-pins 3pwm1pwm1m0-pins 4pwm2pwm2m0-pins 5pwm3pwm3m0-pins 6pwm4pwm4m0-pins  pwm5pwm5m0-pins pwm6pwm6m1-pins  pwm7pwm7m0-pins  pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins  pwm12pwm12m0-pins  pwm13pwm13m0-pins  pwm14pwm14m0-pins  pwm15pwm15m0-pins  refclksatasata0sata1sata2sdiosdiom1-pins` sdmmcsdmmc-bus4@ sdmmc-clk sdmmc-cmd sdmmc-det spdif0spdif0m0-tx spdif1spdif1m0-tx spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi1m1-cs1 spi2spi2m2-pins0  spi2m2-cs0 spi3spi3m1-pins0  spi3m1-cs0 spi3m1-cs1 spi4spi4m0-pins0 spi4m0-cs0 spi4m0-cs1 tsadctsadc-shut-org uart0uart0m1-xfer  2uart1uart1m1-xfer   uart2uart2m0-xfer   uart3uart3m1-xfer   uart4uart4m1-xfer   uart5uart5m1-xfer   uart6uart6m1-xfer   uart7uart7m1-xfer   uart8uart8m1-xfer   uart9uart9m1-xfer   vopbt656gpio-functsadc-gpio-func eth0gmac0gmac0-miim #gmac0-rx-bus20 %gmac0-tx-bus20 $gmac0-rgmii-clk  &gmac0-rgmii-bus@   'hym8563hym8563-int yt6801yt6801-isolate yt8531yt8531-rst  (lcdlcdpwr-en 8bl-en 3usbusb-pwren 9usb-otg-pwren usb-host-pwren :wifibt-pwron pcie-clkreq pcie-rst wifi-pwron  pcie-wake hdmi1-soundsimple-audio-cardi2shdmi1 disabledsimple-audio-card,codecsimple-audio-card,cpuusb@fc400000rockchip,rk3588-dwc3snps,dwc3@@5!!!ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide"!S/Pqokaysyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon[.syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon\-syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon\@,syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@@++usb2phy@4000rockchip,rk3588-usb2phy@5!phyclk -usb480m_phy1!n!phyapbokay*otg-portokaysyscon@fd5e4000$rockchip,rk3588-hdptxphy-grfsyscon^@)spdif-tx@fddb8000,rockchip,rk3588-spdifrockchip,rk3568-spdifۀd!u! mclkhclk5!!txt" disabledi2s@fddc8000rockchip,rk3588-i2s-tdm܀5!!!mclk_txmclk_rxhclku!d!utx"!tx-m disabledspdif-tx@fdde8000,rockchip,rk3588-spdifrockchip,rk3568-spdifހd!u!F mclkhclk5!I!Etxt" disabledi2s@fddf4000rockchip,rk3588-i2s-tdm@5!9!9!?mclk_txmclk_rxhclku!6d!utx"!tx-m disabledi2s@fddf8000rockchip,rk3588-i2s-tdm߀5!+!+!'mclk_txmclk_rxhclku!(d!urx"!rx-m disabledi2s@fde00000rockchip,rk3588-i2s-tdm5!&!&!"mclk_txmclk_rxhclku!#d!urx"!rx-m disabledhdmi@fdea0000rockchip,rk3588-dw-hdmi-qp05!!!!9!S!pclkearcrefaudhdphclk_vo1Pi@avpcecearcmainhpdldefault    "!!1refhdpnp disabledports+port@0port@1edp@fded0000rockchip,rk3588-edp5!!dppclkldp"!!dpapbpokay ports+port@0endpoint{ sport@1endpoint{aux-buspanel edp-panel " 6 = Gportendpoint{hdmi_receiver@fdee0000.rockchip,rk3588-hdmirx-ctrlersnps,dw-hdmi-rx`0 @cechdmidma85! !!! ! !!!3aclkaudiocr_parapclkrefhclk_s_hdmirxhclk_vo1 T" !!!!axiapbrefbiunFp disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+05!@!E!;!J!O!t)aclk_mstaclk_slvaclk_dbipclkauxpipepciP@syspmcmsglegacyerr` pcie-phy""TP @ @0 @@+dbiapbconfig!&!+ pwrpipeokay 9Elegacy-interrupt-controller$ pcie-ep@fe150000rockchip,rk3588-pcie-epP @ @ @ @0+dbidbi2apbaddr_spaceatu05!@!E!;!J!O!t)aclk_mstaclk_slvaclk_dbipclkauxpipe +@syspmcmsglegacyerrdma0dma1dma2dma3 pcie-phy""!&!+ pwrpipe disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+05!A!F!<!K!P!u)aclk_mstaclk_slvaclk_dbipclkauxpipepciP@syspmcmsglegacyerr` pcie-phy""TP @ @@0 @@@+dbiapbconfig!'!, pwrpipe disabledlegacy-interrupt-controller$ pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /05!B!G!=!L!Q!)aclk_mstaclk_slvaclk_dbipclkauxpipepciP@syspmcmsglegacyerr`    pcie-phy""TP @ @0 @@+dbiapbconfig!(!- pwrpipe+okay 9Edefaultlegacy-interrupt-controller$ ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a @macirqeth_wake_irq(5!6!7!X!]!40stmmacethclk_mac_refpclk_macaclk_macptp_ref"!!# stmmacethnU.fv ! disabled boutput o" zrgmii-rxid#$%&'default  Cmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-ieee802.3-c22default( N   9 "stmmac-axi-configrx-queues-config queue0queue1tx-queues-config!queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci"(5!c!`!f!U!psatapmaliverxoobrefasic + disabledsata-port@0@ sata-phy+ : phy@fed70000rockchip,rk3588-hdptx-phy 5!!Urefapb8!&!!f!g!h!$!%"phyapbinitcmnlaneroplllcpll)okaylphy@fed90000rockchip,rk3588-usbdp-phy5!!m!W*refclkimmortalpclkutmi(!!!!!initcmnlanepcs_apbpma_apb O+ b s,okayphy@fee10000rockchip,rk3588-naneng-combphy5!!w!W refapbpipeu!!=!Dphyapb . -okayphy@fee80000rockchip,rk3588-pcie3-phy5!ypclk!Hphy . .okayopp-table-cluster0operating-points-v2  opp-1008000000 < L L~ @opp-1200000000 G 4 4~ @opp-1416000000 Tfr ~ @ opp-1608000000 _" P P~ @opp-1800000000 kI ~~~ @opp-table-cluster1operating-points-v2 opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-cluster2operating-points-v2 opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-tableoperating-points-v2#opp-300000000  L L Popp-400000000 ׄ L L Popp-500000000 e L L Popp-600000000 #F L L Popp-700000000 )' ` ` Popp-800000000 / q q Popp-900000000 5 5 5 Popp-1000000000 ; P P Panalog-soundaudio-graph-card/ rk3588-es8316.MIC2Mic JackHeadphonesHPOLHeadphonesHPOR)MicrophoneMic JackHeadphoneHeadphoneschosen serial2:1500000n8regulator-avdd0v85-pcie20regulator-fixed,avdd0v85_pcie20O;a Py P0regulator-avdd1v8-pcie20regulator-fixed,avdd1v8_pcie20O;aw@yw@1regulator-avdd0v75-pcie30regulator-fixed,avdd0v75_pcie30O;a qy q2regulator-avdd1v8-pcie30regulator-fixed,pcie30_avdd1v8O;aw@yw@1backlightpwm-backlight ,default3 G495abatterysimple-battery>@`B`0}-dc-charger gpio-chargermains ?hdmi-conhdmi-connector aportendpoint{6|leds gpio-ledsled-0 status ? heartbeatled-1 wlan ?led-2 charging ?regulator-vcc12v-dcinregulator-fixed ,vcc12v_dcin;Oay4regulator-vcc-sysregulator-fixed,vcc_sys;Oajyj47regulator-vcc5v0-sysregulator-fixed ,vcc5v0_sys;Oajyj70regulator-vcc3v3-sysregulator-fixed ,vcc3v3_sys;Oa2Zy2Z0regulator-vcc3v3-lcdregulator-fixed ,vcc3v3_lcd default8regulator-vcc5v0-usbregulator-fixed ,vcc5v0_usbO;aLK@yLK@ default97-regulator-vcc5v0-usb-hostregulator-fixed ,vcc5v0_hostO;aLK@yLK@ default:-, compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclockscpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapalloc-rangesalignmentassigned-clocksassigned-clock-ratesclock-namespower-domainsmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkmaximum-speedsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosdomain-supplyiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parentsremote-endpoint#sound-dai-cellsrockchip,vo-grfbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapiommu-mapnum-lanesinterrupt-controllerreset-gpiosvpcie3v3-supplyrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthfifo-depthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpno-sdiono-mmcsd-uhs-sdr104vqmmc-supplymmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdnon-removablerockchip,trcm-sync-tx-onlydai-formatdma-noncoherentmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellscellwise,battery-profilecellwise,monitor-interval-msmonitored-batterypower-supplieshid-descr-addrnum-csgpio-controller#gpio-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsforce-hpdhpd-absent-delay-msno-hpdbacklightpower-supplymemory-regionclock_in_outphy-handlephy-moderx_delaytx_delayreset-assert-usreset-deassert-usrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspenddaislabelroutingwidgetsstdout-pathenable-gpiospwmscharge-full-design-microamp-hoursvoltage-max-design-microvoltvoltage-min-design-microvoltcharger-typecolorlinux,default-triggerenable-active-highgpio